R5F51136ADFM PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 R5F51136ADFM
기능 32-Bit MCU
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R5F51136ADFM 데이터시트, 핀배열, 회로
RX113 Group
User’s Manual: Hardware
RX Family / RX100 Series
All information contained in these materials, including products and product specifications,
represents information on the product at the time of publication and is subject to change by
Renesas Electronics Corp. without notice. Please review the latest information published by
Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
website (
Rev.1.02 Dec 2014

R5F51136ADFM pdf, 반도체, 판매, 대치품
General Precautions in the Handling of MPU/MCU Products
The following usage notes are applicable to all MPU/MCU products from Renesas. For detailed usage notes on the
products covered by this document, refer to the relevant sections of the document as well as any technical updates that
have been issued for the products.
1. Handling of Unused Pins
Handle unused pins in accord with the directions given under Handling of Unused Pins in the manual.
The input pins of CMOS products are generally in the high-impedance state. In operation with an
unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of LSI, an
associated shoot-through current flows internally, and malfunctions occur due to the false
recognition of the pin state as an input signal become possible. Unused pins should be handled as
described under Handling of Unused Pins in the manual.
2. Processing at Power-on
The state of the product is undefined at the moment when power is supplied.
The states of internal circuits in the LSI are indeterminate and the states of register settings and
pins are undefined at the moment when power is supplied.
In a finished product where the reset signal is applied to the external reset pin, the states of pins
are not guaranteed from the moment when power is supplied until the reset process is completed.
In a similar way, the states of pins in a product that is reset by an on-chip power-on reset function
are not guaranteed from the moment when power is supplied until the power reaches the level at
which resetting has been specified.
3. Prohibition of Access to Reserved Addresses
Access to reserved addresses is prohibited.
The reserved addresses are provided for the possible future expansion of functions. Do not access
these addresses; the correct operation of LSI is not guaranteed if they are accessed.
4. Clock Signals
After applying a reset, only release the reset line after the operating clock signal has become stable.
When switching the clock signal during program execution, wait until the target clock signal has
When the clock signal is generated with an external resonator (or from an external oscillator)
during a reset, ensure that the reset line is only released after full stabilization of the clock signal.
Moreover, when switching to a clock signal produced with an external resonator (or by an external
oscillator) while program execution is in progress, wait until the target clock signal is stable.
5. Differences between Products
Before changing from one product to another, i.e. to a product with a different part number, confirm
that the change will not lead to problems.
The characteristics of an MPU or MCU in the same group but having a different part number may
differ in terms of the internal memory capacity, layout pattern, and other factors, which can affect
the ranges of electrical characteristics, such as characteristic values, operating margins, immunity
to noise, and amount of radiated noise. When changing to a product with a different part number,
implement a system-evaluation test for the given product.


R5F51136ADFM 전자부품, 판매, 대치품
2. Description of Registers
Each register description includes a bit chart, illustrating the arrangement of bits, and a table of bits, describing the
meanings of the bit settings. The standard format and notation for bit charts and tables are described below.
X.X.X ... Register
Address(es): xxxx xxxxh
b7 b6 b5 b4 b3 b2 b1 b0
— ...[1:0] ...4 — — — ...0
Value after reset: x 0 0 0 0 0 0 0
x: Undefined
Bit Symbol Bit Name
b0 ...0
b3 to b1 —
b4 ...4
b6, b5 ...[1:0]
b7 —
0: ......
1: Setting prohibited
These bits are read as 0. The write value should be 0.
0: ......
1: ......
0 0: ......
0 1: ......
Settings other than above are prohibited.
The read value is undefined. Writing to this bit has no effect.
(1) R/W:
The bit or field is readable and writable.
The bit or field is readable and writable. However, writing to this bit or field has some
limitations. For details on the limitations, see the description or notes of respective registers.
The bit or field is readable. Writing to this bit or field has no effect.
(2) Reserved.
Use the specified value when writing to this bit or field; otherwise, the correct operation is not
(3) Setting prohibited. The correct operation is not guaranteed if such a setting is performed.


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