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PDF IZ1325 Data sheet ( Hoja de datos )
| Número de pieza | IZ1325 | |
| Descripción | High-precision Real Time Clock circuit | |
| Fabricantes | Integral | |
| Logotipo |  |
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IZ1325
High-precision Real Time Clock circuit
with thermal compensation and built-in quartz resonator
(Functional analogue of RX8025SA by Company « Epson Toyocom »)
The IZ1325 high-precision real-time clock circuit with thermal compensation and built-in quartz
resonator, provides high accuracy counting the current time of the, generation of 6 system inter-
ruptions and two independent event signals. The device provides both 24/12-hour operation
modes and contains the built-in supply control circuit, frequency adjustment circuit for high ac-
curacy of the system generator. The IZ1325 support data and command exchange by means of
standard 2-wire interface (I2C-bus).
The IC is applied in the wide range of the industrial and household equipment and appli-
ances, where it is required to counting and processing of the system current time data.
Main functions:
• seconds, minites hours, weekday, date, month and year time counting;
• two operational modes12/24-hours;
• data and command exchange via 2-wire I2C-bus serial interface;
• 6 system interrupts generation;
• 2 independent alarms: day, hours, minutes and hours, minutes;
• supply voltage and system generator frequency monitoring.
Main features:
• Supply voltage, UDD, 1,7 … 5,5 V
• Oscilator operating supply voltage UCLK, 1,15 … 5,5 V
• Operating temperature range -40 to +85 °С
Table 1 – Contact pad description
Contact
pad num-
ber
01
02
03
04
05
06
07
08
09
10
11
Symbol
GND
INTA
X1
X2
FOE
VDD
TEST
FOUT
SCL
SDA
INTB
Description
Ground
Interrupt output A
Quartz resonator input
Quartz resonator output
Control input
Power supply
Test terminal
32.768 kHz clock output
I2C bus clock input
I2C bus input-output
Interrupt output B
Ver.1.0/02.11.2010
1 IZ1325-TSe
549888
www.bms.by
1 page  
START
Input/output
SDA
t SU:STA
Input
SCL
t RCV
Data
tSU:DAT
t HD:STA
Data
Data
t HD:DAT tHIGH
tLOW
t PL;DAT
tPZ;DAT
START condition hold time tHD:STA ≥ 0,6 μs.
SCL low time tLOW ≥ 1,3 μs.
SCL high time tHIGH ≥ 0,6 μs.
START condition set-up time tSU:STA ≥ 0,6 μs.
Data hold time tHD:DAT ≥ 0 ns.
Data set-up tSU:DAT ≥ 200 ns.
SCL fall to SDA low delay tPL DAT ≤ 900 ns.
SCL fall to SDA third state delay tPZ:DAT ≤ 900 ns.
STOP condition set-up time tSU:STO ≥ 0,6 μs.
STOP to START condition recovery time tRCV ≥ 62 μs.
Fig. 3 –Timing diagram of data transfer
IZ1325
STOP
t SU:STO
Ver.1.0/02.11.2010
5 IZ1325-TSe
549888
www.bms.by
5 Page 
IZ1325
<Slave
address> Write
S 0110010 0 A
Address
setup
oh~Fh
Data
transfer
01 00
А
Data read (1)
Data read (2)
bit
7
bit
6
bit
5
bit
4
bit
3
bit
2
bit
1
bit
0
A
bit
7
bit
6
bit
5
bit
4
bit
3
bit
2
bit
1
bit
0
_
A
P
Fig. 8 – Simplified algorithm of data reading
<Slave
address>
Read
S 0110010 1
Data read
Data read
(data is read from address Fh)
(data is read from address Fh+1)
A
bit
7
bit
6
bit
5
bit
4
bit
3
bit
2
bit
1
bit
0
A
bit
7
bit
6
bit
5
bit
4
bit
3
bit
2
bit
1
bit
0
_
A
P
Fig. 9 – Data reading from address Fh
IZ1325 is delivered in the die form
Die weight is not exceed 0,0015g.
Y
Technological mark
(0,0)
X
Die thichness 0,46±0,02 mm.
Technological mark “1325” coordinates, mm: x = 0,364, y = 0,109.
Fig. 9 – Chip and contact pad layout diagram
11
Ver.1.0/02.11.2010
IZ1325-TSe
549888
www.bms.by
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet IZ1325.PDF ] | |
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