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74HCT139-Q100 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 74HCT139-Q100
기능 Dual 2-to-4 line decoder/demultiplexer
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74HCT139-Q100 데이터시트, 핀배열, 회로
74HC139-Q100; 74HCT139-Q100
Dual 2-to-4 line decoder/demultiplexer
Rev. 1 — 19 June 2014
Product data sheet
1. General description
The 74HC139-Q100; 74HCT139-Q100 decodes two binary weighted address inputs
(nA0, nA1) to four mutually exclusive outputs (nY0 to nY3). Each decoder features an
enable input (nE). When nE is HIGH all outputs are forced HIGH. The enable input can be
used as the data input for a 1-to-4 demultiplexer application. Inputs include clamp diodes
that enable the use of current limiting resistors to interface inputs to voltages in excess of
VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Input levels:
For 74HC139-Q100: CMOS level
For 74HCT139-Q100: TTL level
Demultiplexing capability
2 independent 2-to-4 decoders
Multifunction capability
Suitable for memory decoding, data routing or code conversion
Complies with JEDEC standard no. 7A
Active LOW mutually exclusive outputs
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options




74HCT139-Q100 pdf, 반도체, 판매, 대치품
NXP Semiconductors
74HC139-Q100; 74HCT139-Q100
Dual 2-to-4 line decoder/demultiplexer
5. Pinning information
5.1 Pinning
+&4
+&74
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Fig 5. Pin configuration SO16, SSOP16 and TSSOP16
 9&&
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 <
 <
DDD
5.2 Pin description
Table 2. Pin description
Symbol
1E, 2E
1A0, 1A1
1Y0, 1Y1, 1Y2, 1Y3
GND
2Y0, 2Y1, 2Y2, 2Y3
2A0, 2A1
VCC
Pin
1, 15
2, 3
4, 5, 6, 7
8
12, 11, 10, 9
14, 13
16
6. Functional description
Description
enable input (active LOW)
address input
output (active LOW)
ground (0 V)
output (active LOW)
address input
positive supply voltage
Table 3.
Control
nE
H
L
L
L
L
Function table[1]
Input
nA1
X
L
L
H
H
nA0
X
L
H
L
H
Output
nY3
H
H
H
H
L
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
nY2
H
H
H
L
H
nY1
H
H
L
H
H
nY0
H
L
H
H
H
74HC_HCT139_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 June 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
4 of 18

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74HCT139-Q100 전자부품, 판매, 대치품
NXP Semiconductors
74HC139-Q100; 74HCT139-Q100
Dual 2-to-4 line decoder/demultiplexer
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 C
Tamb
Unit
40 C to +85 C 40 C to +125 C
Min Typ Max Min Max Min Max
74HCT139-Q100
VIH HIGH-level VCC = 4.5 V to 5.5 V
input voltage
2.0 1.6 -
2.0
-
2.0
-V
VIL LOW-level VCC = 4.5 V to 5.5 V
input voltage
- 1.2 0.8
-
0.8
-
0.8 V
VOH HIGH-level
VI = VIH or VIL; VCC = 4.5 V
output voltage
IO = 20 A
4.4 4.5 -
4.4
-
4.4
-V
IO = 4 mA
3.98 4.32 - 3.84
-
3.7
-V
VOL LOW-level
VI = VIH or VIL; VCC = 4.5 V
output voltage
IO = 20 A
- 0 0.1 -
0.1
-
0.1 V
IO = 4.0 mA
- 0.15 0.26 - 0.33 -
0.4 V
II input leakage VI = VCC or GND;
current
VCC = 5.5 V
- - 0.1 -
1.0
-
1.0 A
IOZ
OFF-state
per input pin; VI = VIH or VIL; -
- 0.5 -
5.0
-
output current VO = VCC or GND;
other inputs at VCC or GND;
VCC = 5.5 V; IO = 0 A
10 A
ICC
supply current VI = VCC or GND; IO = 0 A;
-
- 8.0
-
80
-
160 A
VCC = 5.5 V
ICC
additional
supply current
VI = VCC 2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V;
IO = 0 A
per input pin; 1An inputs
- 70 252
-
315
-
343 A
per input pin; 2An inputs
- 70 252
-
315
-
343 A
per input pin; nE inputs
- 135 486
-
607.5
-
661.5 A
CI input
capacitance
- 3.5 -
-
-
-
- pF
74HC_HCT139_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 June 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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부품번호상세설명 및 기능제조사
74HCT139-Q100

Dual 2-to-4 line decoder/demultiplexer

NXP
NXP

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