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부품번호 | KK74AC574 기능 |
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기능 | Octal 3-State | ||
제조업체 | KODENSHI | ||
로고 | |||
TECHNICAL DATA
Octal 3-State
Noninverting D Flip-Flop
High-Performance Silicon-Gate CMOS
KK74AC574
The KK74AC574 is identical in pinout to the LS/ALS574,
HC/HCT574. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LS/ALS outputs.
Data meeting the setup time is clocked to the outputs with the rising
edge of the Clock. The Output Enable input does not affect the states of
the flip-flops, but when Output Enable is high, all device outputs are
forced to the high-impedance state; thus, data may be stored even when
the outputs are not enabled.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA; 0.1 µA @ 25°C
• High Noise Immunity Characteristic of CMOS Devices
• Outputs Source/Sink 24 mA
ORDERING INFORMATION
KK74AC574N Plastic
KK74AC574DW SOIC
TA = -40° to 85° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 20=VCC
PIN 10 = GND
FUNCTION TABLE
Output
Enable
L
L
L
Inputs
Clock
L,H,
HX
X = don’t care
Z = high impedance
Output
DQ
HH
LL
X no
change
XZ
1
KK74AC574
AC ELECTRICAL CHARACTERISTICS (CL=50pF, Input tr=tf=3.0 ns)
Symbol
Parameter
VCC*
Guaranteed Limits
V 25 °C
-40°C to
85°C
Min Max Min Max
fmax Maximum Clock Frequency (50% Duty
Cycle) (Figure 1)
3.3 75
5.0 95
60
85
tPLH Propagation Delay, Clock to Q (Figure 1)
3.3 3.5 13.5 3.5 15
5.0 2.0 9.5 2.0 11
tPHL Propagation Delay, Clock to Q (Figure 1)
3.3 3.5 12 3.5 13.5
5.0 2.0 8.5 2.0 9.5
tPZH Propagation Delay, Output Enable to Q
(Figure 2)
3.3 2.5 11 2.5 12
5.0 2.0 8.5 2.0 9.0
tPZL Propagation Delay, Output Enable to Q
(Figure 2)
3.3 3.0 10.5 3.5 11.5
5.0 1.5 8.0 2.0 9.0
tPHZ Propagation Delay, Output Enable to Q
(Figure 2)
3.3 4.0 12 4.5 13
5.0 2.0 9.5 2.0 10.5
tPLZ Propagation Delay, Output Enable to Q
(Figure 2)
3.3 2.0 9.0 2.5 10
5.0 1.5 7.5 1.5 8.5
CIN Maximum Input Capacitance
5.0 5.0
5.0
Unit
MHz
ns
ns
ns
ns
ns
ns
pF
CPD Power Dissipation Capacitance
*Voltage Range 3.3 V is 3.3 V ±0.3 V
Voltage Range 5.0 V is 5.0 V ±0.5 V
Typical @25°C,VCC=5.0 V
25
pF
TIMING REQUIREMENTS (CL=50pF, Input tr=tf=3.0 ns)
Symbol
tSU
th
tw
Parameter
Minimum Setup Time, Data to Clock
(Figure 3)
Minimum Hold Time, Clock to Data (Figure
3)
Minimum Pulse Width, Clcok (Figure 1)
*Voltage Range 3.3 V is 3.3 V ±0.3 V
Voltage Range 5.0 V is 5.0 V ±0.5 V
VCC*
V
3.3
5.0
3.3
5.0
3.3
5.0
Guaranteed Limit
25°C
-40°C to 85°C
2.5 3.0
1.5 2.0
1.5 1.5
1.5 1.5
6.0 7.0
4.0 5.0
Unit
ns
ns
ns
4
4페이지 | |||
구 성 | 총 6 페이지수 | ||
다운로드 | [ KK74AC574.PDF 데이터시트 ] |
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
KK74AC574 | Octal 3-State | KODENSHI |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |