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PDF MAX7420 Data sheet ( Hoja de datos )
| Número de pieza | MAX7420 | |
| Descripción | 5th-Order / Lowpass / Switched-Capacitor Filters | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-1821; Rev 0; 11/00
5th-Order, Lowpass,
Switched-Capacitor Filters
General Description
The MAX7418–MAX7425 5th-order, low-pass, switched-
capacitor filters (SCFs) operate from a single +5V
(MAX7418–MAX7421) or +3V (MAX7422–MAX7425)
supply. These devices draw only 3mA of supply current
and allow corner frequencies from 1Hz to 45kHz, mak-
ing them ideal for low-power post-DAC filtering and anti-
aliasing applications. They feature a shutdown mode
that reduces supply current to 0.2µA.
Two clocking options are available: self-clocking
(through the use of an external capacitor), or external
clocking for tighter corner-frequency control. An offset
adjust pin allows for adjustment of the DC output level.
The MAX7418/MAX7422 deliver 53dB of stopband
rejection and a sharp rolloff with a 1.6 transition ratio.
The MAX7421/MAX7425 achieve a sharper rolloff with a
1.25 transition ratio while still providing 37dB of stop-
band rejection. The MAX7419/MAX7423 Bessel filters
provide low overshoot and fast settling, and the
MAX7420/MAX7424 Butterworth filters provide a maxi-
mally flat passband response. Their fixed response sim-
plifies the design task of selecting a clock frequency.
Applications
ADC Anti-Aliasing
DAC Postfiltering
CT2 Base Stations
Speech Processing
Selector Guide
PART
FILTER RESPONSE
OPERATING
VOLTAGE (V)
MAX7418
r = 1.6
+5
MAX7419
Bessel
+5
MAX7420
Butterworth
+5
MAX7421
r = 1.25
+5
Selector Guide continued at end of data sheet.
Pin Configuration
TOP VIEW
COM 1
IN 2
GND 3
VDD 4
MAX7418–
MAX7425
8 CLK
7 SHDN
6 OS
5 OUT
Features
o 5th-Order, Lowpass Filters
Elliptic Response (MAX7418/MAX7421/
MAX7422/MAX7425)
Bessel Response (MAX7419/MAX7423)
Butterworth Response (MAX7420/MAX7424)
o Clock-Turnable Corner Frequency (1Hz to 45kHz)
o Single-Supply Operation
+5V (MAX7418–MAX7421)
+3V (MAX7422–MAX7425)
o Low Power
3mA (Operating Mode)
0.2µA (Shutdown Mode)
o Available in 8-Pin µMAX Package
o Low Output Offset: ±4mV
Ordering Information
PART
TEMP. RANGE PIN-PACKAGE
MAX7418CUA
0°C to +70°C
8 µMAX
MAX7418EUA
-40°C to +85°C 8 µMAX
MAX7419CUA
0°C to +70°C
8 µMAX
MAX7419EUA
-40°C to +85°C 8 µMAX
MAX7420CUA
0°C to +70°C
8 µMAX
MAX7420EUA
-40°C to +85°C 8 µMAX
MAX7421CUA
0°C to +70°C
8 µMAX
MAX7421EUA
-40°C to +85°C 8 µMAX
Ordering Information continued at end of data sheet.
Typical Operating Circuit
VSUPPLY
0.1µF
INPUT
CLOCK
VDD SHDN
IN OUT
MAX7418–
MAX7425
CLK COM
OS
GND
OUTPUT
0.1µF
µMAX
________________________________________________________________ Maxim Integrated Products 1
For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
1 page  
5th-Order, Lowpass,
Switched-Capacitor Filters
FILTER CHARACTERISTICS
(VDD = +5V for MAX7418-MAX7420, VDD = +3V for MAX7422-MAX7425 filter output measured at OUT, 10kΩ || 50pF load to GND at
OUT, SHDN = VDD, fCLK = 2.2MHz, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
ELLIPTIC, R = 1.2—MAX7421/MAX7425
fIN = 0.38fC
Insertion Gain with DC Gain
Error Removed (Note 4)
fIN = 0.68fC
fIN = 0.87fC
fIN = 0.97fC
fIN = fC
fIN = 1.25fC
fIN = 1.43fC
fIN = 3.25fC
BESSEL FILTERS—MAX7419/MAX7423
Insertion Gain Relative to
DC Gain
fIN = 0.5fC
fIN = fC
fIN = 4fC
fIN = 7fC
BESSEL FILTERS—MAX7419/MAX7423
fIN = 0.5fC
Insertion Gain Relative to
DC Gain
fIN = 4fC
fIN = 7fC
fIN = 7fC
BEUSTTSERLWFIOLRTETRHSF—ILMTEARXS74—0M9/AMXA7X472401/M3 AX7424
fIN = 0.5fC
Insertion Gain Relative to
DC Gain
fIN = fC
fIN = 3fC
fIN = 5fC
CONDITIONS
MIN TYP MAX UNITS
-0.4 -0.2
0.4
-0.4 -0.2
0.4
-0.4 -0.2
0.4
-0.4 -0.2
0.4
-0.7 -0.2
0.2
-36 -33
-37.2 -35
-37.2 -35
dB
-1 -0.74
-3.6 -3.0 -2.4
-41.0 -35
-67 -60
dB
-1.0 -0.74
-3.6 -3.0 -2.4
-41.0 -35
-67 -60
dB
-0.3 0
-3.6 -3.0 -2.4
-47.5 -43
-70 -65
dB
Note 1: The maximum fC is defined as the clock frequency fCLK = 100 x fC at which the peak S / (THD+N) drops to 68dB with a
sinusoidal input at 0.2fC. Maximum fC increases as VIN signal amplitude decreases.
Note 2: DC insertion gain is defined as ΔVOUT / ΔVIN.
Note 3: MAX7418/MAX7421/MAX7422/MAX7425: fOSC (kHz) ≅ 87x103 / COSC (pF).
MAX7419/MAX7420/MAX7423/MAX7424: fOSC (kHz) ≅ 110x103 / COSC (pF).
Note 4: PSRR is the change in output voltage from a VDD of 4.5V and a VDD of 5.5V.
_______________________________________________________________________________________ 5
5 Page 
5th-Order, Lowpass,
Switched-Capacitor Filters
VSUPPLY
2V/div
A
2V/div
B
2V/div
C
200μs/div
A: 1kHz INPUT SIGNAL
B: MAX7419 BESSEL FILTER RESPONSE; fC = 5kHz
C: MAX7420 BUTTERWORTH FILTER RESPONSE; fC = 5kHz
Figure 3. Bessel vs. Butterworth Filter Response
Internal Clock
When using the internal oscillator, the capacitance
(COSC) on CLK determines the oscillator frequency:
fOSC(kHz) =
k
COSC (pF)
where
k=87x103 for the
MAX7418/MAX7421/MAX7422/MAX7425
and
k=110X103 for the
MAX7419/MAX7420/MAX7423/ MAX7424.
Since COSC is in the low picofarads, minimize the stray
capacitance at CLK so that it does not affect the inter-
nal oscillator frequency. Varying the rate of the internal
oscillator adjusts the filter’s corner frequency by a
100:1 clock-to-corner frequency ratio. For example, an
internal oscillator frequency of 2.2kHz produces a nom-
inal corner frequency of 2.2MHz.
Input Impedance vs. Clock Frequencies
The MAX7418–MAX7425s’ input impedance is effective-
ly that of a switched-capacitor resistor (see the following
equation), and is inversely proportional to frequency.
The input impedance values determined by the equa-
tion represent the average input impedance, since the
input current is not continuous. As a rule, use a driver
with an output resistance less than 10% of the filter’s
input impedance.
0.1μF
INPUT
CLOCK
VDD SHDN
OUT OUTPUT
IN COM
0.1μF
50k
MAX7418–
MAX7425
CLK OS 50k
0.1μF
50k
GND
Figure 4. Offset Adjustment Circuit
Estimate the input impedance of the filter by using the
following formula:
ZIN
=
1
(fCLK × CIN)
where fCLK = clock frequency and CIN = 1pF.
Low-Power Shutdown Mode
The MAX7418–MAX7425 have a shutdown mode that is
activated by driving SHDN low. In shutdown mode, the
filter supply current reduces to 0.2µA, and the output of
the filter becomes high impedance. For normal opera-
tion, drive SHDN high or connect to VDD.
Applications Information
Offset (OS) and Common-Mode (COM)
Input Adjustment
COM sets the common-mode input voltage and is
biased at midsupply with an internal resistor-divider. If
the application does not require offset adjustment, con-
nect OS to COM. For applications in which offset
adjustment is required, apply an external bias voltage
through a resistor-divider network to OS, as shown in
Figure 4. For applications that require DC level shifting,
adjust OS with respect to COM. (Note: Do not leave OS
unconnected.) The output voltage is represented by
these equations:
VOUT = (VIN − VCOM ) + VOS
VCOM
=
VDD (typical)
2
where (VIN - VCOM) is lowpass filtered by the SCF and
OS is added at the output stage. See the Electrical
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet MAX7420.PDF ] | |
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