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PDF MTSF2P02HD Data sheet ( Hoja de datos )
| Número de pieza | MTSF2P02HD | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MTSF2P02HD
Preferred Device
Power MOSFET
2 Amps, 20 Volts
P−Channel Micro8t
These Power MOSFET devices are capable of withstanding high
energy in the avalanche and commutation modes and the drain−to−source
diode has a very low reverse recovery time. Micro8 devices are designed
for use in low voltage, high speed switching applications where power
efficiency is important. Typical applications are dc−dc converters, and
power management in portable and battery powered products such as
computers, printers, cellular and cordless phones. They can also be used
for low voltage motor controls in mass storage products such as disk
drives and tape drives. The avalanche energy is specified to eliminate the
guesswork in designs where inductive loads are switched and offer
additional safety margin against unexpected voltage transients.
• Miniature Micro8 Surface Mount Package − Saves Board Space
• Extremely Low Profile (<1.1mm) for thin applications such as
PCMCIA cards
• Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery
Life
• Logic Level Gate Drive − Can Be Driven by Logic ICs
• Diode Is Characterized for Use In Bridge Circuits
• Diode Exhibits High Speed, With Soft Recovery
• IDSS Specified at Elevated Temperature
• Avalanche Energy Specified
• Mounting Information for Micro8 Package Provided
8
http://onsemi.com
2 AMPERES
20 VOLTS
RDS(on) = 90 mW
P−Channel
D
G
S
MARKING
DIAGRAM
Micro8
CASE 846A
STYLE 1
1
WW
AD
WW = Date Code
PIN ASSIGNMENT
Source
Source
Source
Gate
18
27
36
45
Top View
Drain
Drain
Drain
Drain
ORDERING INFORMATION
Device
Package
Shipping
MTSF2P02HDR2 Micro8 4000 Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2000
September, 2004 − Rev. XXX
1
Publication Order Number:
MTSF2P02HD/D
1 page  
MTSF2P02HD
POWER MOSFET SWITCHING
Switching behavior is most easily modeled and predicted
by recognizing that the power MOSFET is charge
controlled. The lengths of various switching intervals (∆t)
are determined by how fast the FET input capacitance can
be charged by current from the generator.
The published capacitance data is difficult to use for
calculating rise and fall because drain−gate capacitance
varies greatly with applied voltage. Accordingly, gate
charge data is used. In most cases, a satisfactory estimate of
average input current (IG(AV)) can be made from a
rudimentary analysis of the drive circuit so that
t = Q/IG(AV)
During the rise and fall time interval when switching a
resistive load, VGS remains virtually constant at a level
known as the plateau voltage, VSGP. Therefore, rise and fall
times may be approximated by the following:
tr = Q2 x RG/(VGG − VGSP)
tf = Q2 x RG/VGSP
where
VGG = the gate drive voltage, which varies from zero to VGG
RG = the gate drive resistance
and Q2 and VGSP are read from the gate charge curve.
During the turn−on and turn−off delay times, gate current is
not constant. The simplest calculation uses appropriate
values from the capacitance curves in a standard equation for
voltage change in an RC network. The equations are:
td(on) = RG Ciss In [VGG/(VGG − VGSP)]
td(off) = RG Ciss In (VGG/VGSP)
The capacitance (Ciss) is read from the capacitance curve at
a voltage corresponding to the off−state condition when
calculating td(on) and is read at a voltage corresponding to the
on−state when calculating td(off).
At high switching speeds, parasitic circuit elements
complicate the analysis. The inductance of the MOSFET
source lead, inside the package and in the circuit wiring
which is common to both the drain and gate current paths,
produces a voltage at the source which reduces the gate drive
current. The voltage is determined by Ldi/dt, but since di/dt
is a function of drain current, the mathematical solution is
complex. The MOSFET output capacitance also
complicates the mathematics. And finally, MOSFETs have
finite internal gate resistance which effectively adds to the
resistance of the driving source, but the internal resistance
is difficult to measure and, consequently, is not specified.
The resistive switching time variation versus gate
resistance (Figure 11) shows how typical switching
performance is affected by the parasitic circuit elements. If
the parasitics were not present, the slope of the curves would
maintain a value of unity regardless of the switching speed.
The circuit used to obtain the data is constructed to minimize
common inductance in the drain and gate circuit loops and
is believed readily achievable with board mounted
components. Most power electronic loads are inductive; the
data in the figure is taken with a resistive load, which
approximates an optimally snubbed inductive load. Power
MOSFETs may be safely operated into an inductive load;
however, snubbing reduces switching losses.
1800
1500 Ciss
VGS = 0 V
TJ = 25°C
1200
900
600 Crss
Ciss
300
0
8
VDS = 0 V
Crss
404
VGS VDS
Coss
8 12 16
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 9. Capacitance Variation
20
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5
5 Page 
MTSF2P02HD
TAPE & REEL INFORMATION
Micro8
Dimensions are shown in millimeters (inches)
PIN
NUMBER 1
2.05 (.080)
1.95 (.077)
4.10 (.161)
3.90 (.154)
B
BA
1.60 (.063)
1.50 (.059)
1.85 (.072)
1.65 (.065)
0.35 (.013)
0.25 (.010)
12.30
11.70
(.484)
(.461)
5.55 (.218)
5.45 (.215)
3.50 (.137)
3.30 (.130)
FEED DIRECTION
5.40 (.212)
5.20 (.205)
A
8.10 (.318)
7.90 (.312)
1.60 (.063)
1.50 (.059)
TYP.
1.50 (.059)
1.30 (.052)
SECTION A−A
SECTION B−B
NOTES:
1. CONFORMS TO EIA−481−1.
2. CONTROLLING DIMENSION: MILLIMETER.
18.4 (.724)
MAX.
NOTE 3
330.0
(13.20)
MAX.
13.2 (.52)
12.8 (.50)
50.0
(1.97)
MIN.
NOTES:
1. CONFORMS TO EIA−481−1.
2. CONTROLLING DIMENSION: MILLIMETER.
3. INCLUDES FLANGE DISTORTION AT OUTER EDGE.
4. DIMENSION MEASURED AT INNER HUB.
14.4 (.57)
12.4 (.49)
NOTE 4
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11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MTSF2P02HD.PDF ] | |
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