PDF ATUC64L4U Data sheet ( Hoja de datos )

Número de pieza	ATUC64L4U
Descripción	32-bit Atmel AVR Microcontroller
Fabricantes	ATMEL Corporation
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Features • High-performance, Low-power 32-bit Atmel® AVR® Microcontroller – Compact Single-cycle RISC Instruction Set Including DSP Instructions – Read-modify-write Instructions and Atomic Bit Manipulation – Performance • Up to 64DMIPS Running at 50MHz from Flash (1 Flash Wait State) • Up to 36DMIPS Running at 25MHz from Flash (0 Flash Wait State) – Memory Protection Unit (MPU) • Secure Access Unit (SAU) providing User-defined Peripheral Protection • picoPower® Technology for Ultra-low Power Consumption • Multi-hierarchy Bus System – High-performance Data Transfers on Separate Buses for Increased Performance – 12 Peripheral DMA Channels improve Speed for Peripheral Communication • Internal High-speed Flash – 256Kbytes, 128Kbytes, and 64Kbytes Versions – Single-cycle Access up to 25MHz – FlashVault Technology Allows Pre-programmed Secure Library Support for End User Applications – Prefetch Buffer Optimizing Instruction Execution at Maximum Speed – 100,000 Write Cycles, 15-year Data Retention Capability – Flash Security Locks and User-defined Configuration Area • Internal High-speed SRAM, Single-cycle Access at Full Speed – 32Kbytes (256Kbytes and 128Kbytes Flash) and 16Kbytes (64Kbytes Flash) • Interrupt Controller (INTC) – Autovectored Low-latency Interrupt Service with Programmable Priority • External Interrupt Controller (EIC) • Peripheral Event System for Direct Peripheral to Peripheral Communication • System Functions – Power and Clock Manager – SleepWalking Power Saving Control – Internal System RC Oscillator (RCSYS) – 32 KHz Oscillator – Multipurpose Oscillator, Phase Locked Loop (PLL), and Digital Frequency Locked Loop (DFLL) • Windowed Watchdog Timer (WDT) • Asynchronous Timer (AST) with Real-time Clock Capability – Counter or Calendar Mode Supported • Frequency Meter (FREQM) for Accurate Measuring of Clock Frequency • Universal Serial Bus (USBC) – Full Speed and Low Speed USB Device Support – Multi-packet Ping-pong Mode • Six 16-bit Timer/Counter (TC) Channels – External Clock Inputs, PWM, Capture, and Various Counting Capabilities • 36 PWM Channels (PWMA) – 12-bit PWM with a Source Clock up to 150MHz • Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART) – Independent Baudrate Generator, Support for SPI – Support for Hardware Handshaking 32-bit Atmel AVR Microcontroller ATUC256L3U ATUC128L3U ATUC64L3U ATUC256L4U ATUC128L4U ATUC64L4U 32142D–06/2013 1 page ATUC64/128/256L3/4U 2. Overview 2.1 Block Diagram Figure 2-1. Block Diagram TCK TDO TDI TMS DATAOUT RESET_N MCKO MDO[5..0] MSEO[1..0] EVTI_N EVTO_N JTAG INTERFACE aWire NEXUS CLASS 2+ OCD AVR32UC CPU MEMORY PROTECTION UNIT INSTR DATA INTERFACE INTERFACE LOCAL BUS INTERFACE LOCAL BUS 32/16 KB SRAM SAU DP USB 2.0 Interface DM 8EP M S/M S S M MS HIGH SPEED BUS MATRIX S SM CONFIGURATION REGISTERS BUS HSB-PB BRIDGE B HSB-PB BRIDGE A PERIPHERAL DMA CONTROLLER 256/128/64 KB FLASH POWER MANAGER CLOCK PA PB CONTROLLER SLEEP CONTROLLER RESET CONTROLLER GCLK_IN[2..0] GCLK[9..0] RCSYS RC32OUT RC32K XIN32 XOUT32 XIN0 XOUT0 RC120M OSC32K OSC0 DFLL PLL SYSTEM CONTROL INTERFACE EXTINT[5..1] NMI PWMA[35..0] INTERRUPT CONTROLLER EXTERNAL INTERRUPT CONTROLLER PWM CONTROLLER ASYNCHRONOUS TIMER WATCHDOG TIMER FREQUENCY METER CAPACITIVE TOUCH MODULE USART0 USART1 USART2 USART3 SPI TWI MASTER 0 TWI MASTER 1 TWI SLAVE 0 TWI SLAVE 1 8-CHANNEL ADC INTERFACE INTER-IC SOUND CONTROLLER AUDIO BITSTREAM DAC AC INTERFACE GLUE LOGIC CONTROLLER TIMER/COUNTER 0 TIMER/COUNTER 1 DIS VDIVEN CSA[16:0] CSB[16:0] SMP SYNC RXD TXD CLK RTS, CTS SCK MISO, MOSI NPCS[3..0] TWCK TWD TWALM TWCK TWD TWALM ADP[1..0] TRIGGER AD[8..0] ADVREFP ISCK IWS ISDI ISDO IMCK CLK DAC0, DAC1 DACN0, DACN1 ACBP[3..0] ACBN[3..0] ACAP[3..0] ACAN[3..0] ACREFN OUT[1..0] IN[7..0] A[2..0] B[2..0] CLK[2..0] PA PB 32142D–06/2013 5 5 Page ATUC64/128/256L3/4U Table 3-1. GPIO Controller Function Multiplexing 39 51 PA17 17 VDDIO Normal I/O (TWI) 41 53 PA18 18 VDDIO Normal I/O ADCIFB- AD[4] 40 52 PA19 19 VDDIO Normal I/O ADCIFB- AD[5] 25 33 PA20 20 VDDIN Normal I/O USART2- TXD Normal 24 32 PA21 21 VDDIN I/O (TWI, 5V tolerant, USART2- RXD SMBus) 9 13 PA22 22 VDDIO Normal I/O USART0- CTS 6 8 PB00 32 VDDIO Normal I/O USART3- TXD 20 PB01 33 VDDIO High- drive I/O USART3- RXD 7 9 PB02 34 VDDIO Normal I/O USART3- RTS 8 10 PB03 35 VDDIO Normal I/O USART3- CTS Normal I/O (TWI, 21 29 PB04 36 VDDIN 5V TC1-A0 tolerant, SMBus) Normal I/O (TWI, 20 28 PB05 37 VDDIN 5V TC1-B0 tolerant, SMBus) 30 42 PB06 38 VDDIO Normal I/O TC1-A1 31 43 PB07 39 VDDIO Normal I/O TC1-B1 32 44 PB08 40 VDDIO Normal I/O TC1-A2 29 39 PB09 41 VDDIO Normal I/O TC1-B2 23 31 PB10 42 VDDIN Normal I/O TC1-CLK0 44 56 PB11 43 VDDIO Normal I/O TC1-CLK1 5 7 PB12 44 VDDIO Normal I/O TC1-CLK2 15 22 PB13 45 VDDIN USB I/O USBC-DM 16 23 PB14 46 VDDIN USB I/O USBC-DP TC0-A1 TC0-B1 TWIMS0- TWD USART2- CLK ADCIFB- ADP[0] ADCIFB- ADP[1] USART3- CLK USART3- CLK USART1- RTS USART1- CTS USART3- TXD USART3- RXD USART3- RTS USART3- CTS USART1- TXD USART1- RXD USART3- TXD USART3- RXD USART2- CTS TC0-A2 TC0-A1 TC0-B1 TC0-B2 SPI- NPCS[0] SPI-SCK SPI-MISO SPI-MOSI USART1- CLK USART1- CLK ADCIFB- AD[6] ADCIFB- AD[7] ADCIFB- AD[8] USART3- CLK USART3- CLK TWIMS1- TWALM TWIMS1- TWD GLOC- IN[4] TWIMS1- TWALM GLOC- IN[3] ADCIFB- TRIGGER CAT-SMP TC0-A1 TC0-B1 TC0-A2 TC0-B2 TWIMS0- TWALM TWIMS0- TWCK GLOC- IN[2] GLOC- IN[1] GLOC- IN[0] GLOC- OUT[1] ADCIFB- TRIGGER CAT- SYNC TC1-A1 TC1-B1 PWMA- PWMA[17] PWMA- PWMA[18] PWMA- PWMA[19] PWMA- PWMA[20] CAT-SMP CAT- SYNC SCIF- GCLK_IN[ 0] SCIF- RC32OUT PWMA- PWMA[21] PWMA- PWMAOD [21] PWMA- PWMA[22] PWMA- PWMA[23] PWMA- PWMA[24] PWMA- PWMA[25] PWMA- PWMA[26] ACIFB- ACBN[2] ACIFB- ACAP[2] ACIFB- ACAN[2] ACIFB- ACBP[2] PWMA- PWMA[27] PWMA- PWMAOD [27] PWMA- PWMA[28] PWMA- PWMAOD [28] PWMA- PWMA[29] ACIFB- ACAN[3] PWMA- PWMA[30] PWMA- PWMA[31] PWMA- PWMA[32] PWMA- PWMA[33] PWMA- PWMA[34] PWMA- PWMA[35] PWMA- PWMA[7] PWMA- PWMA[24] ACIFB- ACAP[3] CAT- SYNC ACIFB- ACBN[1] SCIF- GCLK_IN[ 1] CAT- VDIVEN ACIFB- ACBP[3] ADCIFB- ADP[1] CAT-DIS EIC- EXTINT[5] CAT-SYNC SCIF- GCLK[0] TC1-A0 TC1-A1 SCIF- GCLK[1] TC1-A2 TWIMS1- TWCK SCIF- GCLK[3] EIC- NMI (EXTINT[0]) EIC- EXTINT[1] EIC- EXTINT[2] EIC- EXTINT[3] EIC- EXTINT[4] EIC- EXTINT[5] SCIF- GCLK[4] SCIF- GCLK[5] SCIF- GCLK[5] CAT- CSB[8] CAT- CSB[0] CAT- CSA[10] CAT- CSA[12] CAT- SMP CAT- CSB[10] CAT- CSA[9] CAT- CSB[9] CAT- CSB[11] CAT- CSA[11] CAT- CSA[14] CAT- CSB[14] CAT- CSB[13] CAT- CSA[13] CAT- CSB[12] CAT- CSB[15] CAT- CSB[16] CAT- CSA[16] CAT- CSA[15] CAT- CSB[2] CAT- CSB[9] 32142D–06/2013 11 11 Page

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