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IZE4442 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 IZE4442
기능 INTELLIGENT 256-BYTE EEPROM
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IZE4442 데이터시트, 핀배열, 회로
IZE4442
INTELLIGENT 256-BYTE EEPROM WITH WRITE PROTECT FUNCTION
AND PROGRAMMABLE SECURITY CODE (PSC)
Features
256 x 8-bit EEPROM organization
Byte-wise addressing
Irreversible byte-wise write protection of lowest
32 addresses (Byte 0...31)
32 x 1-bit organization of protection memory
Two-wire link protocol
End of processing indicated at data output
Answer-to-Reset ace. to ISO standard 7816-3
Programming time 2.5 ms per byte for both erasing
and writing
Minimum of 104 write/erase cycles1)
Data retention for minimum of ten years1)
Contact configuration and serial interface in accordance
with ISO standard 7816 (synchronous transmission)
Additional Feature of IZE4442
Data can only be changed after entry of the correct 3-byte programmable security code (security memory)
Type
Ordering Code
Package
IZE4442 M2.2
on request
Wire-Bonded Module M2.2
IZE4442 C
on request
Chip
IZE4442 M2.2
on request
Wire-Bonded Module M2.2
IZE4442 C
on request
Chip
1) Values are temperature dependent, for further information please refer to your sales office.
Pin Configuration(top view)
(Card Contacts)Pin Definitions and Functions
Card Contact
Symbol
Function
C1
VCC
Supply voltage
C2 RST
Reset
C3 CLK Clock input
C4
N.C.
Not connected
C5 GND
Ground
C6
N.C.
Not connected
C7 I/O Bi-directional data line
(open drain)
C8
N.C.
Not connected
IZE4442 comes as a M2.2 wire-bonded module for embedding in plastic cards or as a die for customer
packaging.
1




IZE4442 pdf, 반도체, 판매, 대치품
IZE4442
The transmission protocol consists of the 4 modes:
- Reset and Answer-to-Reset
- Command Mode
- Outgoing Data Mode
- Processing Mode
Operational modes
Note: The I/O pin is open drain and therefore requires an external pull up resistor to achieve a high level.
Reset and Answer-to-Reset
Answer-to-Reset takes place according to ISO standard 7816-3 (ATR). The reset can be given at any time
during operation. In the beginning, the address counter is set to zero together with a clock pulse and the first
data bit (LSB) is output to I/O when RST is set from level H to level L. Under a continuous input of additional
31 clock pulses the contents of the first 4 EEPROM addresses is read out. The 33rd clock pulse switches
I/O to high impedance Z and finishes the ATR procedure.
Answer-to-Reset (Hex)
Byte 1
Byte 2
DO7...DO0
DO15... DO8
Byte 3
D023...D016
Byte 4
DO31 ...DO24
Figure 2 Reset and Answer-to-Reset
Operational Modes
Command Mode
After the Answer-to-Reset the chip waits for a command. Every command begins with a start condition,
includes a 3 bytes long command entry followed by an additional clock pulse and ends with a stop condition.
- Start condition: Falling edge on I/O during CLK in level H
- Stop condition: Rising edge on I/O during CLK in level H
After the reception of a command there are two possible modes:
- Outgoing data mode for reading
- Processing mode for writing and erasing
Outgoing Data Mode
In this mode the 1C sends data to the IFD. The first bit becomes valid on I/O after the first falling edge on
CLK. After the last data bit an additional clock pulse is necessary in order to set I/O to high impedance Z and
to prepare the 1C for a new command entry. During this mode any start and stop condition is discarded.
Processing Mode
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IZE4442 전자부품, 판매, 대치품
IZE4442
1
Data Byte 1 (D7...D0)
Protection Bit 1 (D1) Reference Data Byte 1 (D7...D0)
0
Data Byte 0 (D7...D0)
Protection Bit 0 (D0)
Error Counter
Command: READ MAIN MEMORY
Control
Address
Data
B7 B6 B5 B4 B3 B2 B1 B0
A7...A0
D7...D0
Binary
0 0 1 1 0 0 0 0 Address No effect
Hexadecimal
30H
00H...FFH No effect
Figure 5 Read Main Memory
2.3.2 Read Protection Memory
The command transfers the protection bits under a continuous input of 32 dock pulses to the output. I/O is
switched to high impedance Z by an additional pulse. The protection memory can always be read, and
indicates the data bytes of the main memory protected against changing.
Address
(decimal)
Main Memory
Protection Memory
Security Memory
255 Data Byte 255 (D7...D0)
:
:
:
-
-
32 Data Byte 32 (D7...D0)
-
31 Data Byte 31 (D7...D0) Protection Bit 31 (D31)
:
:
-
-
:
3
Data Byte 3 (D7...D0)
Protection Bit 3 (D3) Reference Data Byte 3 (D7...D0)
2
Data Byte 2 (D7...D0)
Protection Bit 2 (D2) Reference Data Byte 2 (D7...D0)
1
Data Byte 1 (D7...D0)
Protection Bit 1 (D1) Reference Data Byte 1 (D7...D0)
0
Data Byte 0 (D7...D0)
Protection Bit 0 (D0)
Error Counter
Command: READ PROTECTION MEMORY
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전력 반도체 판매 ( IGBT, TR 모듈, SCR, 다이오드 모듈 )

휴대전화 : 010-3582-2743


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부품번호상세설명 및 기능제조사
IZE4442

INTELLIGENT 256-BYTE EEPROM

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