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LV8094CT PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 LV8094CT
기능 Piezo Actuator Driver IC
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LV8094CT 데이터시트, 핀배열, 회로
Ordering number : ENA1527
LV8094CT
Bi-CMOS IC
Piezo Actuator Driver IC
http://onsemi.com
Overview
The LV8094CT is a piezoelectric actuator driver IC. It internally generates drive waveforms and this makes it possible
to control piezoelectric actuators with simple instructions.
Features
Actuators using piezoelectric elements can be driven and controlled simply by I2C communication.
The piezoelectric drive waveforms are set externally by serial input signals using the I2C interface.
The rising and falling timings are determined with clock count.
ENIN input that controls the startup/stop of the IC.
The time for which the actuator is driven is determined with the drive frequency setting based on I2C communication.
Provides a busy signal output during periods when the actuator is being driven by OUT pin output so that applications
can be aware of the actuator operating/stopped state.
Built-in undervoltage protection circuits, and register power-on reset function.
Specifications
Absolute Maximum Ratings at Ta = 25°C, GND = 0V
Parameter
Symbol
Conditions
Supply voltage
Output current
Peak output current
Input signal voltage
Allowable power dissipation
VCC max
IO max
IO peak1
IO peak2
VIN max
Pd max
t 1ms
t 10μs
*Mounted on a specified board.
Operating temperature
Topr
Storage temperature
Tstg
* Specified board : 40mm×40mm×1.6mm, glass epoxy board.
Ratings
-0.5 to 5.0
300
750
1200
-0.5 to VCC+0.5
350
-30 to +85
-55 to +125
Unit
V
mA
mA
mA
V
mW
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Semiconductor Components Industries, LLC, 2013
June, 2013
80509 SY 20090710-S00001 No.A1527-1/15




LV8094CT pdf, 반도체, 판매, 대치품
Block Diagram
LV8094CT
VCC
OUT1
OUT2
RFG
Startup
control
block
Piezoelectric drive
waveform generation
register
I2C interface
Output control
GND
CLK SCL SDA
Value of the resistor connected to the RFG pin
Inrush current flowing to the piezoelectric elements can be controlled in the LV8094CT by inserting a resistor between
the RFG pin and GND potential.
Since the resistance affects the actuator operation, the constant must be determined in a range from 0 to 3.3Ω while
monitoring the operation of the actuator.
Capacitor on the VCC line
Piezoelectric actuators are capacitive loads in electrical terms, and they operate units by charging and discharging the
charges. Since the charge between the capacitor on the VCC line and piezoelectric elements is transferred, the capacitor
must be mounted near the VCC pin. The capacitance of the capacitor required is determined by the capacitance of the
piezoelectric element. A capacitance within a range that does not affect operation must be selected.
No.A1527-4/15

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LV8094CT 전자부품, 판매, 대치품
LV8094CT
Data transfer and acknowledgement response
After the start condition is generated, data is transferred one byte (8 bits) at a time. Any number of data bytes can be
transferred consecutively.
An ACK signal is sent to the sending side from the receiving side every time 8 bits of data are transferred. The
transmission of an ACK signal is performed by setting the receiving side SDA to low after SDA at the sending side is
released immediately after the clock pulse of SCL bit 8 in the data transferred has fallen low.
After the receiving side has sent the ACK signal, if the next byte transfer operation is to receive only the byte, the
receiving side releases SDA on the falling edge of the 9th clock of SCL.
There are no CE signals in the I2C bus ; instead, a 7-bit slave address is assigned to each device, and the first byte of the
transfer data is allocated to the 7-bit slave address and to the command (R/W) which specifies the direction of
subsequent data transfer.
The READ function of the LV8094CT provides only the functionality to test the BUSY state.
7-bit address data is transferred sequentially starting at the MSB and the second and subsequent bytes are written if the
state of the 8th bit is low and read if the state is high.
In the LV8094CT, the slave address is stipulated to be “1110010.”.
WRITE mode timing
Start
M
S
Slave address
LA
S WC
M
S
Register address
L
S
A
C
M
S
B B KB
BKB
Data
LA
SC
BK
Stop
SCL
SDA
XXXXXXX0
00100010
00000001
READ mode timing
Start
M
S
Slave address
L AM
S RC S
B B KB
Data
LA
SC
BK
Stop
SCL
SDA
XXXXXXX1
10000000
0
No.A1527-7/15

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부품번호상세설명 및 기능제조사
LV8094CT

Piezo Actuator Driver IC

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