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NCL30085 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 NCL30085
기능 Power Factor Corrected Quasi-Resonant Primary Side Current-Mode Controller
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NCL30085 데이터시트, 핀배열, 회로
NCL30085
Power Factor Corrected
Quasi-Resonant Primary
Side Current-Mode
Controller for LED Lighting
with Line Step Dimming and
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Thermal Foldback
8
The NCL30085 is a power factor corrected flyback controller
1
targeting isolated and non−isolated constant current LED drivers. The
controller operates in a quasi−resonant mode to provide optimal
SOIC−8 NB
CASE 751
efficiency. Thanks to a novel control method, the device is able to
tightly regulate a constant LED current from the primary side. This
MARKING DIAGRAM
removes the need for secondary side feedback circuitry, biasing and an
8
optocoupler.
The device is highly integrated with a minimum number of external
components. A robust suite of safety protection is built in to simplify
L30085x
ALYW
G
the design. This device is specifically intended for very compact,
1
space efficient designs and supports 3 levels of log step dimming
L30085x = Specific Device Code
which allows light output reduction by toggling the main AC switch
on and off to signal the controller to reduce the LED current point
down to 5% of full load.
x = A, B
A = Assembly Location
L = Wafer Lot
Y = Year
Features
Quasi−resonant Peak Current−mode Control Operation
W = Work Week
G = Pb-Free Package
Constant Current Control with Primary Side Feedback
Tight LED Constant Current Regulation of ±2% Typical
Power Factor Correction
PIN CONNECTIONS
1
ZCD
VCC
3 Step Dimming (70/25/5%)
VS DRV
Line Feedforward for Enhanced Regulation Accuracy
COMP
GND
Low Start−up Current (10 mA typ.)
Wide Vcc Range
300 mA / 500 mA Totem Pole Driver with 12 V Gate Clamp
SD CS
(Top View)
Robust Protection Features
OVP on VCC
Programmable Over Voltage / LED Open Circuit Protection
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 26 of this data sheet.
Cycle−by−cycle Peak Current Limit
Winding Short Circuit Protection
Secondary Diode Short Protection
Pb−Free, Halide−Free MSL1 Product
Output Short Circuit Protection
Current Sense Short Protection
User Programmable NTC Based Thermal Foldback
Typical Applications
Integral LED Bulbs and Tubes
Thermal Shutdown
LED Light Engines
Vcc Undervoltage Lockout
Brown−out Protection
LED Drivers/Power Supplies
© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. 3
1
Publication Order Number:
NCL30085/D




NCL30085 pdf, 반도체, 판매, 대치품
NCL30085
Table 2. MAXIMUM RATINGS TABLE
Symbol
Rating
Value
Unit
VCC(MAX)
ICC(MAX)
Maximum Power Supply voltage, VCC pin, continuous voltage
Maximum current for VCC pin
−0.3 to 30
Internally limited
V
mA
VDRV(MAX)
IDRV(MAX)
VMAX
IMAX
RθJ−A
TJ(MAX)
Maximum driver pin voltage, DRV pin, continuous voltage
Maximum current for DRV pin
Maximum voltage on low power pins (except DRV and VCC pins)
Current range for low power pins (except DRV and VCC pins)
Thermal Resistance Junction−to−Air
Maximum Junction Temperature
Operating Temperature Range
−0.3, VDRV (Note 1)
−300, +500
−0.3, 5.5 (Notes 2 and 5)
−2, +5
180
150
−40 to +125
V
mA
V
mA
°C/W
°C
°C
Storage Temperature Range
−60 to +150
°C
ESD Capability, HBM model (Note 3)
3.5 kV
ESD Capability, MM model (Note 3)
250 V
ESD Capability, CDM model (Note 3)
2 kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. VDRV is the DRV clamp voltage VDRV(high) when VCC is higher than VDRV(high). VDRV is VCC otherwise.
2. This level is low enough to guarantee not to exceed the internal ESD diode and 5.5−V Zener diode. More positive and negative voltages can
be applied if the pin current stays within the −2−mA / 5−mA range.
3. This device contains ESD protection and exceeds the following tests: Human Body Model 3500 V per JEDEC Standard JESD22−A114E,
Machine Model Method 250 V per JEDEC Standard JESD22−A115B, Charged Device Model 2000 V per JEDEC Standard JESD22−C101E.
4. This device contains latch−up protection and has been tested per JEDEC Standard JESD78D, Class I and exceeds ±100 mA
5. Recommended maximum VS voltage for optimal operation is 4 V. −0.3 V to +4.0 V is hence, the VS pin recommended range.
Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values TJ = 25°C, VCC = 12 V, VZCD = 0 V,
VCS = 0 V, VSD = 1.5 V) For min/max values TJ = −40°C to +125°C, VCC = 12 V)
Description
Test Condition
Symbol
Min Typ Max Unit
STARTUP AND SUPPLY CIRCUITS
Supply Voltage
Startup Threshold
Minimum Operating Voltage
Hysteresis VCC(on) – VCC(off)
Internal logic reset
VCC Over Voltage Protection Threshold
VCC(off) noise filter
VCC(reset) noise filter
Startup current
Startup current in fault mode
Supply Current
Device Disabled/Fault
Device Enabled/No output load on pin 7
Device Switching (FSW = 65 kHz)
CURRENT SENSE
VCC rising
VCC rising
VCC falling
VCC(on)
VCC(off)
VCC(HYS)
VCC(reset)
VCC(OVP)
tVCC(off)
tVCC(reset)
ICC(start)
ICC(sFault)
16.0
8.2
8
4
25.5
18.0
8.8
5
26.8
5
20
13
58
20.0
9.4
6
28.5
30
75
VCC > VCC(off)
Fsw = 65 kHz
CDRV = 470 pF, Fsw = 65 kHz
ICC1
ICC2
ICC3
0.8 1.0 1.2
– 2.5 4.0
− 3.0 4.5
V
V
ms
mA
mA
mA
Maximum Internal current limit
VILIM
0.95 1.00 1.05
V
Leading Edge Blanking Duration for VILIM
tLEB
240 300 360
ns
Line feed−forward current
DRV high, VVS = 2 V
IFF
35 40 45
mA
6. Guaranteed by Design
7. A NTC is generally placed between the SD and GND pins. Parameters RTF(start), RTF(stop), ROTP(off) and ROTP(on) give the resistance the
NTC must exhibit to respectively, enter thermal foldback, stop thermal foldback, trigger the OTP limit and allow the circuit recovery after
an OTP situation.
8. At startup, when VCC reaches VCC(on), the controller blanks OTP for more than 250 ms to avoid detecting an OTP fault by allowing the
SD pin voltage to reach its nominal value if a filtering capacitor is connected to the SD pin.
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NCL30085 전자부품, 판매, 대치품
NCL30085
Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values TJ = 25°C, VCC = 12 V, VZCD = 0 V,
VCS = 0 V, VSD = 1.5 V) For min/max values TJ = −40°C to +125°C, VCC = 12 V)
Description
Test Condition
Symbol
Min Typ Max Unit
FAULT PROTECTION
OTP blanking time when circuit starts operating
(Note 8)
tOTP(start)
250
370 ms
SD pin voltage at which thermal fold−back starts
(VREF is decreased)
SD pin voltage at which thermal fold−back stops
(VREF is clamped to VREF50)
VTF(start) over IOTP(REF) ratio (Note 7)
VTF(stop) over IOTP(REF) ratio (Note 7)
VOTP(off) over IOTP(REF) ratio (Note 7)
VOTP(on) over IOTP(REF) ratio (Note 7)
VREFX @ VSD = 600 mV (percent of VREF)
TJ = +25°C to +125°C
TJ = +25°C to +125°C
TJ = +25°C to +125°C
TJ = +25°C to +125°C
SD pin falling, no OTP
detection
VTF(start)
VTF(stop)
RTF(start)
RTF(stop)
ROTP(off)
ROTP(on)
VREF(50)
0.94 1.00 1.06
0.64 0.69 0.74
10.8 11.7 12.6
7.4 8.1 8.8
5.4 5.9 6.4
7.5 8.1 8.7
40 50 60
V
V
kW
kW
kW
kW
%
BROWN−OUT
Brown−Out ON level (IC start pulsing)
VS rising
VBO(on)
0.95 1.00 1.05
V
Brown−Out OFF level (IC shuts down)
VS falling
VBO(off)
0.85 0.90 0.95
V
BO comparators delay
tBO(delay)
30
ms
Brown−Out blanking time
tBO(blank)
15
25
35
ms
VS pin Pulling−down Current
VS = VBO(on)
IBO(bias)
50 250 450
nA
Step Dimming Reset Time
VS < VBO(off)
tstep−reset 2.4 3.2 4.0
s
6. Guaranteed by Design
7. A NTC is generally placed between the SD and GND pins. Parameters RTF(start), RTF(stop), ROTP(off) and ROTP(on) give the resistance the
NTC must exhibit to respectively, enter thermal foldback, stop thermal foldback, trigger the OTP limit and allow the circuit recovery after
an OTP situation.
8. At startup, when VCC reaches VCC(on), the controller blanks OTP for more than 250 ms to avoid detecting an OTP fault by allowing the
SD pin voltage to reach its nominal value if a filtering capacitor is connected to the SD pin.
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