PDF IZ1991 Data sheet ( Hoja de datos )

Número de pieza	IZ1991
Descripción	CIRCUIT OF MULTIFUNCTIONAL ELECTRONIC KEY
Fabricantes	Integral
Logotipo
Hay una vista previa y un enlace de descarga de IZ1991 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas
No Preview Available ! IZ1991 CIRCUIT OF MULTIFUNCTIONAL ELECTRONIC KEY WITH DATA PROTECTION (functional equvivalent DS1991 «Maxim-Dallas Semiconductor») IZ1991 – circuit of multifunctional electronic key with data protection is perposed for autonomos identification in systems of access control, registration and identification of object. Circuit performs following functions: • One-time data writing in to ROM; • Data storage and reading out of ROM; • CRC-code (Cyclic Redundancy Check) generation ; • Data transfer via 1-wire interface; • Data and password storage for three independent keys. Main features: • 1152-bit secure memory with read/write possibility; • Secure memory can be decoded only on matching 64-bit password • Memory is partitioned into 3 blocks of 384 bits each • 64-bit password and ID fields for each memory block • 512-bit scratchpad ensures data transfer integrity • Supply voltage (battery supply), UDD, from 2,7 to 3,3 V • Operating temperature range from - 40 to +85°С Table 1 - Contact pad description Contact pad num- ber Symbol Function 01 TEST1 Test pad 02 TEST2 Test pad 03 GND Common pin 04 DATA Data I/O 05 UDD Supply voltage 06 TEST3 Test pad 07 TEST4 Test pad 08 TEST5 Test pad 09 TEST6 Test pad 10 TEST7 Test pad 11 TEST8 Test pad 12 TEST9 Test pad 13 TEST10 Test pad Note – Contact pads TEST1 – TEST10 are purposed for testing and not used by customer Ver.01/01.10.2009 1 1 page IZ1991 General operation description The IZ1991 multikey is read/write data carrier that acts as three separate electronic keys, and provide 1152 bits of secured memory to user. Each 384 bits key has 64-bit individual password and public ID fields . The password field must be matched in order to access the secure memory. Data is transferred serially via the 1- Wire protocol, which requires only a single data (signal) lead, a common (ground) & power sup- ply leads. The 512-bit scratchpad memory ensures integrity of data transfers to secure memory. Data should first be written to the scratchpad where it can be read back. After the data verifica- tion, a copy scratchpad memory command will transfer the data to the secure memory. This process ensures data integrity when modifying the memory. Constant power supply of device is requiered for data storage in scratchpad memory. Fig.2 displays RAM map. A 48-bit serial number is written into each IZ1991 during manufacturing process to guar- antee unique identity which provide absolute control possibility. Application fields include secure access control, debit tokens, work-in-progress tracking, electronic monitoring of goods transportation and proprietary (private) data storage. 3F SECURE DATA 3F SUBKEY 1 * (01b) 10 0F 08 07 00 3F PASSWORD ID FIELD SECURE DATA SUBKEY * (11b) UNSECURE DATA 00 3F SECURE DATA SUBKEY 0 * (00b) 10 0F 08 07 00 PASSWORD ID FIELD SUBKEY 2 * (10b) 10 0F 08 07 00 PASSWORD ID FIELD BYTE WIDE BYTE WIDE ___________ * The scratchpad & each subkey or has its own unique address. Fig. 2. RAM map Ver.01/01.10.2009 5 5 Page IZ1991 Table 6 Block number Address range LSB Codes MSB 0 to 7 00 to 3Fh 56 56 7F 51 57 5D 5A 7F 0 ID 9A 9A B3 9D 64 6E 69 4C 1 Password 9A 9A 4C 62 9B 91 69 4C 2 10h to 17h 9A 65 B3 62 9B 6E 96 4C 3 18h to 1Fh 6A 6A 43 6D 6B 61 66 43 4 20h to 27h 95 95 BC 92 94 9E 99 BC 5 28h to 2Fh 65 9A 4C 9D 64 91 69 B3 6 30h to 37h 65 65 B3 9D 64 6E 96 B3 7 38h to 3Fh 65 65 4C 62 9B 91 96 B3 1-wire bus system The 1-Wire bus is a system which has a single bus master and one or more slaves. In all instances, the IZ1991 is a slave device. The bus master is typically a micro-controller. The dis- cussion of this bus system is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling (signal types and timing). A 1-Wire protocol defines bus transac- tions interms of the bus state during specified time slots that are initiated on the falling edge of sync pulses from the bus master. Hardware configuration The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to drive it at the appropriate time. To facilitate this, each device attached to the 1- Wire bus must have an open drain connections or tri-state outputs. The 1-Wire port of the IZ1991 is an open drain part with an internal circuit equivalent to that shown in Fig. 6. The bus master can be the same equivalent circuit. If a bidirectional pin is not available, separate output and input pins can be tied together. The bus master requires a pullup resistor at the master end of the bus, with the bus mas- ter circuit equivalent to the one shown in Fig. 7. The value of the pullup resistor should be ap- proximately 5 kΩ for short line lengths. A multidrop bus consists of a 1-Wire bus with multiple slaves attached. The 1-Wire bus has a maximum data rate of 16.3 kbits per second. The idle state for the 1-Wire bus is high. If, for any reason a transaction needs to be suspended, the bus must be left in the idle state if the transaction is to resume. If this does not occur, and the bus is left low for more than 120 μs, one or more of the devices on the bus may be reset. Ver.01/01.10.2009 11 11 Page

Páginas	Total 18 Páginas
PDF Descargar	[ Datasheet IZ1991.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
IZ1990	CMOS IC	IK Semiconductor
IZ1990	CMOS IC FOR ELECTRONIC KEY	Integral
IZ1991	CIRCUIT OF MULTIFUNCTIONAL ELECTRONIC KEY	Integral

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar