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VS-FA40SA50LC 데이터시트 PDF




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부품번호 VS-FA40SA50LC 기능
기능 Power MOSFET ( Transistor )
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VS-FA40SA50LC 데이터시트, 핀배열, 회로
www.vishay.com
VS-FA40SA50LC
Vishay Semiconductors
Power MOSFET, 40 A
SOT-227
PRODUCT SUMMARY
VDSS
RDS(on)
ID
Type
Package
500 V
0.106
40 A
Modules - MOSFET
SOT-227
FEATURES
• Fully isolated package
• Easy to use and parallel
• Low on-resistance
• Dynamic dV/dt rating
• Fully avalanche rated
• Simple drive requirements
• Low drain to case capacitance
• Low internal inductance
• UL approved file E78996
• Designed for industrial level
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
Third Generation Power MOSFETs from Vishay
Semiconductors provide the designer with the best
combination of fast switching, ruggedized device design,
low on-resistance and cost-effectiveness.
The SOT-227 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 500 W. The low thermal resistance
of the SOT-227 contribute to its wide acceptance
throughout the industry.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
TEST CONDITIONS
Continuous drain current at VGS 10 V
Pulsed drain current
Power dissipation
Gate to source voltage
Single pulse avalanche energy
Repetitive avalanche current
Repetitive avalanche energy
Peak diode recovery dV/dt
ID
IDM (1)
PD
VGS
EAS (2)
IAR (1)
EAR (1)
dV/dt (3)
TC = 25 °C
TC = 90 °C
TC = 25 °C
TC = 90 °C
Operating junction and storage temperature range
Insulation withstand voltage (AC-RMS)
Mounting torque
TJ, TStg
VISO
M4 screw, on terminals and heatsink
Notes
(1) Repetitive rating; pulse width limited by maximum junction temperature (see fig. 18)
(2) Starting TJ = 25 °C, L = 500 μH, Rg = 2.4 , IAS = 40 A (see fig. 18)
(3) ISD 40 A, dIF/dt 200 A/μs, VDD V(BR)DSS, TJ 150 °C
MAX.
40
29
150
543
261
± 20
400
13
42
10
- 55 to + 150
2.5
1.3
UNITS
A
W
V
mJ
A
mJ
V/ns
°C
kV
Nm
Revision: 13-Aug-13
1 Document Number: 94803
For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000




VS-FA40SA50LC pdf, 반도체, 판매, 대치품
www.vishay.com
60
VGS = 15 V
VGS = 12 V
50
VGS = 10 V
40
VGS = 8 V
VGS = 6 V
30
VGS = 5 V
20
VGS = 7 V
10
0
0 2 4 6 8 10 12 14 16 18 20
V , Drain-to-Source Voltage (V)
DS
Fig. 5 - Typical Drain-to-Source Current Output Characteristics
at TJ = 150 °C
320 ID = 40 A
300 VGS = 10 V
280
260
240
220
200
180
160
140
120
100
80
0 20 40 60 80 100 120 140 160
TJ - Junction Temperature (°C)
Fig. 6 - Normalized On-Resistance vs. Temperature
280
TJ = 25 °C
240
200
160
120
80
TJ = 150 °C
40
TJ = 125 °C
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VFSD - Drain to Source Forward Voltage
Drop Characteristics (V)
1.8
Fig. 7 - Typical Body Diode Forward Voltage Drop Characeristics
VS-FA40SA50LC
Vishay Semiconductors
140
120
TJ = 25 °C
100
80
60
40
TJ = 150 °C
20
TJ = 125 °C
0
2.5
3.5 4.5 5.5 6.5 7.5 8.5
VGS - Gate to Source Voltage (V)
9.5
Fig. 8 - Typical MOSFET Transfer Characteristics
10
1
0.1 TJ = 150 °C
0.01
0.001
TJ = 125 °C
0.0001
TJ = 25 °C
0.00001
0
100 200 300 400 500
VDSS - Drain to Source Voltage (V)
600
Fig. 9 - Typical MOSFET Zero Gate Voltage Drain Current
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0.20
TJ = 150 °C
0.40
0.60
ID (mA)
TJ = 25 °C
TJ = 125 °C
0.80 1.00
Fig. 10 - Typical MOSFET Threshold Voltage
Revision: 13-Aug-13
4 Document Number: 94803
For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

4페이지










VS-FA40SA50LC 전자부품, 판매, 대치품
www.vishay.com
VS-FA40SA50LC
Vishay Semiconductors
D.U.T.
+
2
-
1
RG
+ Circuit layout considerations
• Low stray inductance
3 • Ground plane
• Low leakage inductance
current transformer
-
- 4+
• dV/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by duty factor "D"
• D.U.T. - Device under test
+
- VDD
Fig. 23 - Peak Diode Recovery dV/dt Test Circuit
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
VGS=10V *
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
Inductor Curent
Forward Drop
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig. 24 - For N-Channel Power MOSFETs
VDD
ISD
Revision: 13-Aug-13
7 Document Number: 94803
For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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부품번호상세설명 및 기능제조사
VS-FA40SA50LC

Power MOSFET ( Transistor )

Vishay
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