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부품번호 | NSBC114TPDXV6 기능 |
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기능 | Complementary Bias Resistor Transistors | ||
제조업체 | ON Semiconductor | ||
로고 | |||
전체 7 페이지수
MUN5315DW1,
NSBC114TPDXV6
Complementary Bias
Resistor Transistors
R1 = 10 kW, R2 = 8 kW
NPN and PNP Transistors with Monolithic
Bias Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base−emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
• S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(TA = 25°C both polarities Q1 (PNP) and Q2 (NPN), unless otherwise noted)
Rating
Symbol
Max
Unit
Collector−Base Voltage
VCBO
50
Vdc
Collector−Emitter Voltage
VCEO
50
Vdc
Collector Current − Continuous
IC 100 mAdc
Input Forward Voltage
VIN(fwd)
40
Vdc
Input Reverse Voltage
−NPN
−PNP
VIN(rev)
6
5
Vdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
Device
Package
Shipping†
MUN5315DW1T1G,
SMUN5315DW1T1G
SOT−363
3,000 / Tape & Reel
NSBC114TPDXV6T1G
SOT−563
4,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
http://onsemi.com
PIN CONNECTIONS
(3) (2) (1)
R1
Q1
R2 R1
(4) (5)
R2
Q2
(6)
MARKING DIAGRAMS
6
15 M G
G
1
SOT−363
CASE 419B
15 M G
1G
SOT−563
CASE 463A
15 = Specific Device Code
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
© Semiconductor Components Industries, LLC, 2012
September, 2012 − Rev. 0
1
Publication Order Number:
DTC114TP/D
MUN5315DW1, NSBC114TPDXV6
1
IC/IB = 10
TYPICAL CHARACTERISTICS − NPN TRANSISTOR
MUN5315DW1, NSBC114TPDXV6
1000
0.1 75°C
−25°C
25°C
0.01
100 TA = −25°C
10
75°C
25°C
VCE = 10 V
0.001
0
10 20 30 40
IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) vs. IC
1
50 1
10
IC, COLLECTOR CURRENT (mA)
Figure 3. DC Current Gain
100
3.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
0
f = 10 kHz
IE = 0 A
TA = 25°C
5 10 15 20 25 30 35 40 45 50
VR, REVERSE VOLTAGE (V)
Figure 4. Output Capacitance
100
75°C
10
25°C
1
TA = −25°C
0.1
0.01
0.001
0
VO = 5 V
123 4567 89
Vin, INPUT VOLTAGE (V)
Figure 5. Output Current vs. Input Voltage
10
10
TA = −25°C
1
25°C
75°C
VO = 0.2 V
0.1
0
10 20 30 40
IC, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage vs. Output Current
50
http://onsemi.com
4
4페이지 MUN5315DW1, NSBC114TPDXV6
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A
ISSUE F
D
−X−
A
L
654
12 3
E
−Y−
HE
b 65 PL
e 0.08 (0.003) M X Y
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
MILLIMETERS
INCHES
DIM MIN NOM MAX MIN NOM MAX
A 0.50 0.55 0.60 0.020 0.021 0.023
b 0.17 0.22 0.27 0.007 0.009 0.011
C 0.08 0.12 0.18 0.003 0.005 0.007
D 1.50 1.60 1.70 0.059 0.062 0.066
E 1.10 1.20 1.30 0.043 0.047 0.051
e 0.5 BSC
0.02 BSC
L 0.10 0.20 0.30 0.004 0.008 0.012
HE 1.50 1.60 1.70 0.059 0.062 0.066
SOLDERING FOOTPRINT*
0.3
0.0118
1.35
0.0531
1.0
0.0394
0.45
0.0177
0.5 0.5
0.0197 0.0197
ǒ ǓSCALE 20:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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PUBLICATION ORDERING INFORMATION
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http://onsemi.com
7
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For additional information, please contact your local
Sales Representative
DTC114TP/D
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