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SZESD7102 데이터시트 PDF




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기능 ESD Protection Diodes
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SZESD7102 데이터시트, 핀배열, 회로
ESD7102, SZESD7102
Product Preview
ESD Protection Diodes
Low Capacitance ESD Protection Diodes
for High Speed Data Line
The ESD7102 transient voltage suppressor is designed to protect
high speed data lines from ESD. Ultra−low capacitance and low ESD
clamping voltage make this device an ideal solution for protecting
voltage sensitive high speed data lines. The small form factor,
flow−through style package allows for easy PCB layout and matched
trace lengths necessary to maintain consistent impedance between
high speed differential lines such as USB 3.0 and HDMI.
Features
Low Capacitance (0.3 pF Typical, I/O to GND)
Short to Battery Survivability
Protection for the Following IEC Standards:
IEC 61000−4−2 Level 4 (ESD)
Low ESD Clamping Voltage (30 V Typical, +16 A TLP, I/O to GND)
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
Typical Applications
USB2.0/3.0
LVDS
HDMI
High Speed Differential Pairs
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Operating Junction Temperature Range TJ −55 to +125 °C
Storage Temperature Range
Tstg − 55 to +150 °C
Lead Solder Temperature −
Maximum (10 Seconds)
TL 260 °C
IEC 61000−4−2 Contact
IEC 61000−4−2 Air
ESD
±8 kV
±15 kV
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
www.onsemi.com
3
12
SC−75
CASE 463
MARKING
DIAGRAM
XX M
1
XX = Specific Device Code
M = Date Code
PIN CONFIGURATION
AND SCHEMATIC
Pin 1 Pin 2
Pin 3
=
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2015
March, 2015 − Rev. P0
1
Publication Order Number:
ESD7102/D




SZESD7102 pdf, 반도체, 판매, 대치품
ESD7102, SZESD7102
18 −18
16 −16
14 −14
12 −12
10 TBD
8
−10 TBD
−8
6 −6
4 −4
2 −2
0
0 5 10 15 20 25 30 35 40
0
0 −2 −4 −6 −8 −10 −12
VOLTAGE (V)
Figure 7. Positive TLP IV Curve
VOLTAGE (V)
Figure 8. Negative TLP IV Curve
NOTE: TLP parameter: Z0 = 50 W, tp = 100 ns, tr = 300 ps, averaging window: t1 = 30 ns to t2 = 60 ns.
−14
Transmission Line Pulse (TLP) Measurement
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 9. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 10 where an 8 kV IEC 61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels.
L
50 W Coax
Cable
S Attenuator
÷
50 W Coax
Cable
10 MW
IM VM
VC DUT
Oscilloscope
Figure 9. Simplified Schematic of a Typical TLP
System
Figure 10. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
www.onsemi.com
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관련 데이터시트

부품번호상세설명 및 기능제조사
SZESD7102

ESD Protection Diodes

ON Semiconductor
ON Semiconductor

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