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부품번호 MCIMX50 기능
기능 i.MX50 Applications Processors
제조업체 Freescale Semiconductor
로고 Freescale Semiconductor 로고


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MCIMX50 데이터시트, 핀배열, 회로
Freescale Semiconductor
Data Sheet: Technical Data
Document Number: IMX50CEC
Rev. 7, 10/2013
MCIMX50
i.MX50 Applications
Processors for
Consumer Products
Package Information
Plastic Package
Case 416 MAPBGA 13 x 13 mm, 0.5 mm pitch
Case 416 PoPBGA 13 x 13 mm, 0.5 mm pitch
Case 400 MAPBGA 17 x 17 mm, 0.8 mm pitch
Ordering Information
See Table 1 on page 7 for ordering information.
1 Introduction
The i.MX50 applications processors are
multimedia-focused products offering high-performance
processing optimized for lowest power consumption.
The i.MX50 processors are Freescale Energy Efficiency
Solutions products.
The i.MX50 is optimized for portable multimedia
applications and features Freescale’s advanced
implementation of the ARM Cortex-A8® core, which
operates at speeds as high as 1 GHz. The i.MX50
provides a powerful display architecture, including a 2D
Graphics Processing Unit (GPU) and Pixel Processing
Pipeline (ePXP). Additionally, the i.MX50 includes a
complete integration of the electrophoretic display
function. The i.MX50 supports DDR2, LPDDR2, and
LPDDR1 DRAM at clock rate up to 266 MHz to enable
a range of performance and power trade-offs.
The flexibility of the i.MX50 architecture allows it to be
used in a variety of applications. As the heart of the
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1. Product Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7
1.4. Part Number Feature Comparison . . . . . . . . . . . . . 8
1.5. Package Feature Comparison . . . . . . . . . . . . . . . . 9
2. Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3. Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1. Special Signal Considerations . . . . . . . . . . . . . . . 17
4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1. Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . 21
4.2. Supply Power-Up/Power-Down Requirements and
Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.3. I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 31
4.4. Output Buffer Impedance Characteristics . . . . . . 37
4.5. I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 41
4.6. System Modules Timing . . . . . . . . . . . . . . . . . . . . 48
4.7. External Interface Module (EIM) . . . . . . . . . . . . . . 60
4.8. DRAM Timing Parameters . . . . . . . . . . . . . . . . . . 68
4.9. External Peripheral Interfaces . . . . . . . . . . . . . . . 73
5. Package Information and Contact Assignments . . . . . 101
5.1. 13 x 13 mm, 0.5 mm Pitch, 416 Pin MAPBGA Package
Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
5.2. 13 x 13 mm, 0.5 mm Pitch, 416 Pin PoPBGA Package
Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
5.3. 17 x 17 mm, 0.8 mm Pitch, 400 Pin MAPBGA Package
Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.4. Signal Assignments . . . . . . . . . . . . . . . . . . . . . . 124
6. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Freescale reserves the right to change the detail specifications as may be required
to permit improvements in the design of its products.
© 2011–2013 Freescale Semiconductor, Inc. All rights reserved.




MCIMX50 pdf, 반도체, 판매, 대치품
Introduction
• NEON coprocessor (SIMD Media Processing Architecture) and Vector Floating Point (VFP-Lite)
coprocessor supporting VFPv3
The memory system consists of the following components:
• Level 1 cache:
— Instruction (32 Kbyte)
— Data (32 Kbyte)
• Level 2 cache:
— Unified instruction and data (256 Kbyte)
• Level 2 (internal) memory:
— Boot ROM, including HAB (96 Kbyte)
— Internal multimedia/shared, fast access RAM (128 Kbyte)
• External memory interfaces:
— 16/32-bit DDR2-533, LPDDR2-533, or LPDDR1-400 up to a total of 2 GByte
— 8-bit NAND SLC/MLC Flash with up to 100 MHz synchronous clock rate and up to 32-bit
hardware ECC for 1 Kbyte block size
— 16/32-bit NOR Flash with a dedicated 16-bit muxed-mode interface. I/O muxing logic selects
EIMv2 port as primary muxing at system boot.
— 16-bit PSRAM, Cellular RAM
— Managed NAND, including eMMC up to rev 4.4
The i.MX50 introduces a next generation system bus fabric architecture that aggregates various
sub-system buses and masters for access to system peripherals and memories. The various bus-systems
and components are as follows:
• 64-bit AXI Fabric (266 MHz)—This bus-fabric is the SoC’s central bus aggregation point.
— Provides access to all slave targets in the SoC:
– ROM (ROMCP)
– On-chip RAM (OCRAM)
– External DRAM (DRAM MC)
– External static RAM (EIM)
– Interrupt controller (TZIC)
– Decode into the AHB MAX crossbar second level AHB fabric.
— Provides arbitration to the following masters in the system:
– ARM CPU complex
– Pixel processing pipeline (ePXP)
– Electrophoretic display controller (EPDC)
– eLCDIF LCD display controller
– DCP Crypto engine
– BCH ECC engine
– MAX AHB crossbar
i.MX50 Applications Processors for Consumer Products, Rev. 7
4 Freescale Semiconductor

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MCIMX50 전자부품, 판매, 대치품
Introduction
1.3 Ordering Information
Table 1 provides the ordering information.
Table 1. Ordering Information
Part Number
Maximum
ARM CLK
Frequency
Mask
Set
Features
Temperature
Range (°C)
Tambient Tjunction
Package1
MCIMX508CVK1B 1 GHz N78A Full Specification
0 to 70 0 to 90 13 x 13 mm, 0.5 mm pitch BGA
Case: 416 MAPBGA
MCIMX508CVM1B 1 GHz N78A Full Specification
0 to 70 0 to 90 17 x 17 mm, 0.8 mm pitch BGA
Case: 400 MAPBGA
MCIMX508CVK8B 800 MHz N78A Full Specification
0 to 70 0 to 90 13 x 13 mm, 0.5 mm pitch BGA
Case: 416 MAPBGA
MCIMX508CZK8B 800 MHz N78A Full Specification
0 to 70 0 to 90 13 x 13 mm, 0.5 mm pitch BGA
Case: 416 PoPBGA
MCIMX508CVM8B 800 MHz N78A Full Specification
0 to 70 0 to 90 17 x 17 mm, 0.8 mm pitch BGA
Case: 400 MAPBGA
MCIMX507CVM1B 1 GHz N78A No GPU
0 to 70 0 to 90 17 x 17 mm, 0.8 mm pitch BGA
Case: 400 MAPBGA
MCIMX507CVK1B 1 GHz N78A No GPU
0 to 70 0 to 90 13 x 13 mm, 0.5 mm pitch BGA
Case: 416 MAPBGA
MCIMX507CVM8B 800 MHz N78A No GPU
0 to 70 0 to 90 17 x 17 mm, 0.8 mm pitch BGA
Case: 400 MAPBGA
MCIMX507CVK8B 800 MHz N78A No GPU
0 to 70 0 to 90 13 x 13 mm, 0.5 mm pitch BGA
Case: 416 MAPBGA
MCIMX503CVK8B 800 MHz N78A No EPD controller
0 to 70 0 to 90 13 x 13 mm, 0.5 mm pitch BGA
Case: 416 MAPBGA
MCIMX503CVM8B 800 MHz N78A No EPD controller
0 to 70 0 to 90 17 x 17 mm, 0.8 mm pitch BGA
Case: 400 MAPBGA
MCIMX503EVM8B 800 MHz N78A No EPD controller,
Extended Temperature
-20 to 70 -20 to 90 17 x 17 mm, 0.8 mm pitch BGA
Case: 400 MAPBGA
MCIMX502CVK8B 800 MHz N78A No GPU, no EPD controller
0 to 70 0 to 90 13 x 13 mm, 0.5 mm pitch BGA
Case: 416 MAPBGA
MCIMX502CVM8B 800 MHz N78A No GPU, no EPD controller
0 to 70 0 to 90 17 x 17 mm, 0.8 mm pitch BGA
Case: 400 MAPBGA
MCIMX502EVM8B 800 MHz N78A No GPU, no EPD controller,
Extended Temperature
-20 to 70 -20 to 90 17 x 17 mm, 0.8 mm pitch BGA
Case: 400 MAPBGA
1 Case MAPBGA is RoHS compliant, lead-free MSL (Moisture Sensitivity Level) 3.
Freescale Semiconductor
i.MX50 Applications Processors for Consumer Products, Rev. 7
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