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ESD8118 데이터시트 PDF




ON Semiconductor에서 제조한 전자 부품 ESD8118은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 ESD8118 자료 제공

부품번호 ESD8118 기능
기능 ESD Protection Diode
제조업체 ON Semiconductor
로고 ON Semiconductor 로고


ESD8118 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




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ESD8118 데이터시트, 핀배열, 회로
ESD8118
ESD Protection Diode
Low Capacitance Array for High Speed
Data Lines
The ESD8118 transient voltage suppressor is specifically designed
to protect four high speed data pairs from ESD. Ultra−low capacitance
and low ESD clamping voltage make this device an ideal solution for
protecting voltage sensitive high speed data lines. The flow−through
style package allows for easy PCB layout and matched trace lengths
necessary to maintain consistent impedance between high speed
differential lines.
Features
Low Capacitance (0.35 pF Max, I/O to GND)
Protection for the Following IEC Standards:
IEC 61000−4−2 (Level 4)
Low ESD Clamping Voltage
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
HDMI 1.3/1.4/2.0
Display Port
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Operating Junction Temperature Range TJ −55 to +125 °C
Storage Temperature Range
Tstg − 55 to +150 °C
Lead Solder Temperature −
Maximum (10 Seconds)
TL 260 °C
IEC 61000−4−2 Contact (ESD)
IEC 61000−4−2 Air (ESD)
ESD
ESD
±15 kV
±15 kV
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
www.onsemi.com
MARKING
DIAGRAM
UDFN10
CASE 517CY
ACMG
G
PIN CONFIGURATION
I/O I/O I/O
10 9 8
I/O
7
123
I/O GND I/O
45
I/O GND
6
I/O
ORDERING INFORMATION
Device
Package
Shipping
ESD8118MUTAG UDFN10 3000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
See Application Note AND8308/D for further description of
survivability specs.
© Semiconductor Components Industries, LLC, 2015
May, 2015 − Rev. 0
1
Publication Order Number:
ESD8118/D




ESD8118 pdf, 반도체, 판매, 대치품
ESD8118
90
80
70
60
50
40
30
20
10
0
−10
−20
0 20 40 60 80 100 120 140
TIME (ns)
Figure 2. IEC61000−4−2 +8 kV Contact
Clamping Voltage
10
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−20
0 20 40 60 80 100 120
TIME (ns)
Figure 3. IEC61000−4−2 −8 kV Contact
Clamping Voltage
140
IEC 61000−4−2 Spec.
Level
First Peak
Test Volt- Current Current at
age (kV)
(A) 30 ns (A)
1 2 7.5 4
2 4 15 8
3 6 22.5 12
48
30 16
Current at
60 ns (A)
2
4
6
8
IEC61000−4−2 Waveform
Ipeak
100%
90%
I @ 30 ns
I @ 60 ns
10%
Figure 4. IEC61000−4−2 Spec
tP = 0.7 ns to 1 ns
ESD Gun
TVS
Oscilloscope
50 W
Cable
50 W
Figure 5. Diagram of ESD Clamping Voltage Test Setup
The following is taken from Application Note AND8307/D
− Characterization of ESD Clamping Performance.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D and AND8308/D.
www.onsemi.com
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ESD8118 전자부품, 판매, 대치품
ESD8118
Without ESD8118
With ESD8118
Figure 14. HDMI2.0 Eye Diagram with and without ESD8118. 6 Gb/s
www.onsemi.com
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