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부품번호 | NCV7519A 기능 |
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기능 | Hex Low-side MOSFET Pre-driver | ||
제조업체 | ON Semiconductor | ||
로고 | |||
전체 30 페이지수
NCV7519, NCV7519A
FLEXMOS] Hex Low-side
MOSFET Pre-driver
The NCV7519/A programmable six channel low−side MOSFET
pre−driver is one of a family of FLEXMOS automotive grade products
for driving logic−level MOSFETs. The product is controllable by a
combination of serial SPI and parallel inputs. The device offers 3.3 V/
5 V compatible inputs and the serial output driver can be powered
from either 3.3 V or 5 V. An internal power−on reset provides
controlled power up. A reset input allows external re−initialization and
an enable input allows all outputs and diagnostics to be simultaneously
disabled.
Each channel independently monitors its external MOSFET’s drain
voltage for fault conditions. Shorted load fault detection thresholds are
fully programmable using an externally programmed reference
voltage and a combination of discrete internal ratio values. The ratio
values are SPI selectable and allow different detection thresholds for
each channel.
Fault recovery operation for each channel is programmable and may
be selected for latch−off or automatic retry. Status information for
each channel is 3−bit encoded by fault type and is available through
SPI communication.
The FLEXMOS family of products offers application scalability
through choice of external MOSFETs.
Features
• 16−bit SPI with Parity and Frame Error Detection
• 3.3 V/5 V Compatible Parallel and Serial Control Inputs
• 3.3 V/5 V Compatible Serial Output Driver
• Reset and Enable Inputs
• Open−drain Fault Flag
• Priority Encoded Diagnostics with Latched Unique Fault Type Data
♦ Shorted Load, Short to GND
♦ Open Load
♦ On and Off State Pulsed Mode Diagnostics
• Ratiometric Diagnostic References and Currents
• Programmable
♦ Shorted Load Fault Detection Thresholds
♦ Fault Recovery Mode
♦ Blanking Timers
• Wettable Flanks Pb−Free Packaging
• Commercial Vehicle Capable
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• This is a Pb−Free Device
Benefits
• Scalable to Load by Choice of External MOSFET
www.onsemi.com
QFN32
MW SUFFIX
CASE 488AM
QFN32
MW SUFFIX
CASE 485CZ
MARKING DIAGRAM
1
NCV7519x
AWLYYWWG
G
x = blank or A
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 36 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
August, 2015 − Rev. 2
1
Publication Order Number:
NCV7519/D
NCV7519, NCV7519A
PACKAGE PIN DESCRIPTION 32 PIN QFN EXPOSED PAD PACKAGE
Label
Description
FLTREF
Analog Fault Detect Threshold: 5 V Compliant
DRN0 − DRN5 Analog Drain Feedback
GAT0 − GAT5
Analog Gate Drive: 5 V Compliant
RSTB
Digital Master Reset Input: 3.3 V/5 V (TTL) Compatible
ENB
Digital Master Enable Input: 3.3 V/5 V (TTL) Compatible
IN0 − IN5
Digital Parallel Input: 3.3 V/5 V (TTL) Compatible
CSB
Digital Chip Select Input: 3.3 V/5 V (TTL) Compatible
SCLK
Digital Shift Clock Input: 3.3 V/5 V (TTL) Compatible
SI Digital Serial Data Input: 3.3 V/5 V (TTL) Compatible
SO Digital Serial Data Output: 3.3 V/5 V Compliant
FLTB
Digital Open−Drain Output: 3.3 V/5 V Compliant
VLOAD
Power Supply − Diagnostic References and Currents
VCC1
Power Supply − Low Power Path
GND
Power Return − Low Power Path − Device Substrate
VCC2
Power Supply − Gate Drivers
VDD
Power Supply − Serial Output Driver
VSS
Power Return − VLOAD, VCC2, VDD
EP Exposed Pad − Connected to GND − Device Substrate
32 31 30 29 28 27 26 25
Exposed Pad
(EP)
IN0 1
24 GAT2
IN1 2
23 DRN2
IN2 3
22 GAT3
IN3 4
IN4 5
NCV7519
21 DRN3
20 GAT4
IN5 6
19 DRN4
ENB 7
18 GAT5
RSTB 8
17 DRN5
9 10 11 12 13 14 15 16
Figure 3. 32 Pin QFN Exposed Pad Pinout (Top View)
www.onsemi.com
4
4페이지 NCV7519, NCV7519A
ELECTRICAL CHARACTERISTICS (continued)
(4.75 V ≤ VCCX ≤ 5.25 V, VDD = VCCX, 4.5 V ≤ VLOAD ≤ 36 V, RSTB = VCCX, ENB = 0, −40°C ≤ TJ ≤ 150°C, unless otherwise specified.)
(Note 7)
Characteristic
Symbol
Conditions
Min Typ Max Unit
FAULT DETECTION − GATX ON
DRNX Shorted Load Threshold
VFLTREF = 0.35 V
DRNX Input Leakage Current
V25
V40
V50
V60
V70
V80
V90
V100
IDLKG
DRNX Clamp Voltage
VCL
Register R2.C[11:9] = 000 (DEFAULT)
Register R2.C[11:9] = 001
Register R2.C[11:9] = 010
Register R2.C[11:9] = 011
Register R2.C[11:9] = 100
Register R2.C[11:9] = 101
Register R2.C[11:9] = 110
Register R2.C[11:9] = 111
0 V ≤ VCC1 = VCC2 = VDD ≤ 5.25 V,
RSTB = 0 V, VLOAD = VDRNX = 36 V
TA ≤ 25°C
IDRNX= ICL(MAX) =10 mA; Transient
(≤2 ms, ≤1% Duty)
20 25 30 %
35 40 45 VFLTREF
45 50 55
55 60 65
65 70 75
75 80 85
85 90 95
95 100 105
−5.0 −
−1.0 −
mA
5.0
1.0
60 − 78 V
Fault Detection − GATX OFF (7.5 V ≤ VLOAD ≤ 36 V, Register R3.D[5:0] = 1)
DRNX Diagnostic Current
− Proportional to VLOAD
ISG Short to GND Detection, VDRNX = 43%VLOAD
IOL Open Load Detection, VDRNX = 61%VLOAD
DRNX Fault Threshold Voltage
VSG
Short to GND Detection
VOL Open Load Detection
DRNX Off State Bias Voltage
VCTR
VLOAD Undervoltage Threshold VLDUV
VLOAD Decreasing
FAULT TIMERS
−81
2.73
39.56
56.12
46.92
4.1
−60
4.20
43
61
51
6.3
−39
5.67
46.44
65.88
55.08
7.5
mA / V
mA / V
%VLOAD
%VLOAD
%VLOAD
V
Channel Fault Blanking Timers
tBL(ON)
VDRNX = VLOAD; INX rising to FLTB Falling
4.8
6
7.2 ms
(Figure 6)
Register R2.C[6:5] = 00
Register R2.C[6:5] = 01
9.6 12 14.4
Register R2.C[6:5] = 10 (DEFAULT)
19.2 24 28.8
Register R2.C[6:5] = 11
28.8 48 57.6
tBL(OFF)
VDRNX = 0V; INX falling to FLTB Falling
Register R2.C[8:7] = 00
44 55 66 ms
Register R2.C[8:7] = 01
65 81 97
Register R2.C[8:7] = 10 (DEFAULT)
130 162 195
Register R2.C[8:7] = 11
260 325 390
Channel Fault Filter Timer
(Figure 7)
Global Fault Retry Timer
(Figure 8)
tFF(ON)
tFF(OFF)
tFR
Register R0.M[5:0] = 1
2.0 3.0 4.0 ms
44 55 66
6 8 10 ms
Timer Clock
GATE DRIVER OUTPUTS
fCLK
RSTB = VCC1
− 4.0 − MHz
GATX Output Resistance
RGATX
Output High or Low
200 350 500
W
GATX High Output Current
IGSRC
VGATX = 0 V
−26.25
−
−9.5 mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. Min/Max values are valid for the temperature range −40°C ≤ TJ ≤ 150°C unless noted otherwise. Min/Max values are guaranteed by test,
design or statistical correlation.
8. Guaranteed by design.
www.onsemi.com
7
7페이지 | |||
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부품번호 | 상세설명 및 기능 | 제조사 |
NCV7519 | Hex Low-side MOSFET Pre-driver | ON Semiconductor |
NCV7519A | Hex Low-side MOSFET Pre-driver | ON Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |