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NSBC115TD 데이터시트 PDF




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기능 Dual NPN Bias Resistor Transistors
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NSBC115TD 데이터시트, 핀배열, 회로
NSBC115TD
Dual NPN Bias Resistor
Transistors
R1 = 100 kW, R2 = 8 kW
NPN Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
baseemitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Rating
Symbol
Max
Unit
CollectorBase Voltage
VCBO
50
Vdc
CollectorEmitter Voltage
VCEO
50
Vdc
Collector Current Continuous
IC 100 mAdc
Input Forward Voltage
VIN(fwd)
40
Vdc
Input Reverse Voltage
VIN(rev)
6
Vdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
Device
Package
Shipping
NSBC115TDP6T5G
SOT963
8,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
http://onsemi.com
MARKING
DIAGRAM
SOT963
CASE 527AD
AFMG
1G
AF = Specific Device Code
M = Date Code*
G = PbFree Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
PIN CONNECTIONS
(3) (2) (1)
R1
Q1
R2 R1
(4) (5)
R2
Q2
(6)
© Semiconductor Components Industries, LLC, 2013
October, 2013 Rev. 1
1
Publication Order Number:
DTC115TD/D




NSBC115TD pdf, 반도체, 판매, 대치품
10
IC/IB = 10
1
0.1
NSBC115TD
TYPICAL CHARACTERISTICS
NSBC115TDP6
1000
25°C
150°C
55°C
100
150°C
25°C
55°C
0.01
0
2.4
2.0
1.6
1.2
0.8
0.4
0
0
10 20 30 40
IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) vs. IC
50
f = 10 kHz
IE = 0 A
TA = 25°C
VCE = 10 V
10
1
10 100
IC, COLLECTOR CURRENT (mA)
Figure 3. DC Current Gain
100
150°C
10
25°C
55°C
1
10 20 30 40
VR, REVERSE VOLTAGE (V)
Figure 4. Output Capacitance
0.1
VO = 5 V
0.01
50 0 4 8 12 16 20 24 28
Vin, INPUT VOLTAGE (V)
Figure 5. Output Current vs. Input Voltage
100
55°C
10
25°C
150°C
1
0.1
0
VO = 0.2 V
10 20 30 40
IC, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage vs. Output Current
50
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