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BCW69LT1 데이터시트, 핀배열, 회로
BCW69LT1
General Purpose
Transistors
PNP Silicon
MAXIMUM RATINGS
Rating
CollectorEmitter Voltage
EmitterBase Voltage
Collector Current — Continuous
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation FR-5 Board (1)
TA = 25°C
Derate above 25°C
Thermal Resistance, Junction to
Ambient
Total Device Dissipation
Alumina Substrate, (2) TA = 25°C
Derate above 25°C
Thermal Resistance, Junction to
Ambient
Junction and Storage Temperature
Symbol
VCEO
VEBO
IC
Value
45
5.0
100
Unit
Vdc
Vdc
mAdc
Symbol
PD
RθJA
Max
225
1.8
556
Unit
mW
mW/°C
°C/W
PD
RθJA
300 mW
2.4 mW/°C
417 °C/W
TJ, Tstg 55 to +150
°C
http://onsemi.com
3
1
2
CASE 318 08, STYLE 6
SOT23 (TO 236AB)
COLLECTOR
3
1
BASE
2
EMITTER
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
CollectorEmitter Breakdown Voltage (IC = 2.0 mAdc, IB = 0)
CollectorEmitter Breakdown Voltage (IC = 100 μAdc, VEB = 0)
EmitterBase Breakdown Voltage (IE = 10 μAdc, IC = 0)
Collector Cutoff Current
(VCB = 20 Vdc, IE = 0)
(VCB = 20 Vdc, IE = 0, TA = 100°C)
1. FR5 = 1.0 x 0.75 x 0.062 in.
2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina
Symbol
V(BR)CEO
V(BR)CES
V(BR)EBO
ICBO
Min
45
50
5.0
Max
100
10
Unit
Vdc
Vdc
Vdc
nAdc
μAdc
© Semiconductor Components Industries, LLC, 2006
August, 2006 Rev. 2
1
Publication Order Number:
BCW69LT1/D




BCW69LT1 pdf, 반도체, 판매, 대치품
BCW69LT1
TYPICAL STATIC CHARACTERISTICS
1.0
TA = 25°C
0.8
0.6
IC = 1.0 mA 10 mA
50 mA 100 mA
0.4
0.2
0
0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0
IB, BASE CURRENT (mA)
5.0 10
Figure 6. Collector Saturation Region
20
100
TA = 25°C
PULSE WIDTH = 300 μs
80 DUTY CYCLE 2.0%
300 μA
60
40
20
350 μA
IB = 400 μA
250 μA
200 μA
150 μA
100 μA
50 μA
0
0 5.0 10 15 20 25 30 35 40
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 7. Collector Characteristics
1.4
TJ = 25°C
1.2
1.0
0.8
VBE(sat) @ IC/IB = 10
0.6
VBE(on) @ VCE = 1.0 V
0.4
0.2
0
0.1
VCE(sat) @ IC/IB = 10
0.2 0.5 1.0
2.0
5.0 10 20
IC, COLLECTOR CURRENT (mA)
Figure 8. “On” Voltages
50 100
1.6
*APPLIES for IC/IB hFE/2
0.8
*qVC for VCE(sat)
0
25°C to 125°C
− 55°C to 25°C
0.8
1.6
qVB for VBE
25°C to 125°C
− 55°C to 25°C
2.4
0.1
0.2 0.5 1.0 2.0 5.0 10 20
IC, COLLECTOR CURRENT (mA)
50
Figure 9. Temperature Coefficients
100
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BCW69LT1 전자부품, 판매, 대치품
BCW69LT1
INFORMATION FOR USING THE SOT23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT23
SOT23 POWER DISSIPATION
The power dissipation of the SOT23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by TJ(max), the maximum rated junction
temperature of the die, RθJA, the thermal resistance from the
device junction to ambient, and the operating temperature,
TA. Using the values provided on the data sheet for the
SOT23 package, PD can be calculated as follows:
PD =
TJ(max) TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD =
150°C 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT23 package assumes the use of
the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts.
There are other alternatives to achieving higher power
dissipation from the SOT23 package. Another alternative
would be to use a ceramic substrate or an aluminum core
board such as Thermal Clad. Using a board material such
as Thermal Clad, an aluminum core board, the power
dissipation can be doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
Always preheat the device.
The delta temperature between the preheat and soldering
should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the maximum
temperature gradient shall be 5°C or less.
After soldering has been completed, the device should be
allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
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