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AK8456 데이터시트 PDF




AKM에서 제조한 전자 부품 AK8456은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 AK8456 기능
기능 3 channel input 16bit 30MSPS Video ADC
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AK8456 데이터시트, 핀배열, 회로
[AK8456]
AK8456
3 channel input 16bit 30MSPS Video ADC with LED driver
1. General Description
AK8456 is an AFE for three channels contact image sensor (CIS). AK8456 has offset adjusting DAC,
digital programmable gain amplifier (PGA) and LED drivers. AK8456 is suitable for multi-function
printer and image scanner.
2. Feature
Input Block
Channel number
3 channel (1 channel mode is available)
Range
1.3Vpp (min.)
Gain 0dB/6dB
ADC
Maximum conversion ratio
30MSPS
10MSPS/ch @ 3-channel mode
30MSPS/ch @ 1-channel mode
Resolution
16bit (Straight binary code/Gray code)
Black correction DAC
Range
Resolution
369mV (Equivalent input voltage) ±250mV(min.)
6bit
Digital PGA
Range
0dB~18dB
Resolution
8bit
Output Format
8bit × 2
LED Current
67.2mA/ch (typ.) @ Maximum setting
CPU I/F
Adjustable by 12.5% resolution channel independently
3-wire serial interface
Supply Voltage
Power Consumption
AFE: 3.3V0.3V, LED driver: 4.5V~5.7V
190 mW (typ.)Except LED drive current.
Operating Temperature 0C~70C
Package
36pin QFN (Exposed Die Pad), 0.4mm pitch, 5mm5mm
014002433-E-00
-1-
2014/06




AK8456 pdf, 반도체, 판매, 대치품
[AK8456]
ADC
After offset adjust, the ADC convert analog signal level to digital data. The ADC has 16-bit resolution
and 30MSPS maximum conversion ratio. The output code is straight binary, 0000h corresponds to
black signal and FFFFh corresponds to white signal.
Digital PGA
The digital PGA amplifies A/D data. Its gain range is 0dB~18dB and gain resolution is 8bit.
Output Control Block
The output control block converts 16-bit width data to two 8-bit width data. Higher 8-bit is output at
ADCK rising edge and lower 8-bit is output at ADCK falling edge. Gray code output is possible too
by register setting.
Reference Voltage Generation Block
Reference Voltage
This block generates internal reference voltage VRP, sensor reference voltage VDC and LDO
reference voltage.
Internal Clock Generation Block
Clock Gen
This block generates internal pulses using A/D clock ADCK and sampling pulse SHD.
LED Driver Control Block
LED Control
This block controls LED switching and LED current. LED current is adjustable from 100% to12.5%
by 12.5% step channel independently. 100% current is 67.2mA per channel.
Serial Interface Block Serial I/F
Control registers are written and read through 3-wire serial interface.
Low Dropout Voltage Regulator LDO
The LDO generate 1.8V supply from 3.3V of AVDD. The 1.8V is used for internal circuit. There are
two LDO for analog circuit and digital circuit.
014002433-E-00
-4-
2014/06

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AK8456 전자부품, 판매, 대치품
[AK8456]
6. Absolute Maximum Ratings
AVSS=OVSS=LVSS=0V. All voltages are based on ground.
Item
Symbol Min.
Max.
Unit Remarks
Analog Supply
AVDD -0.3
4.6
V
Digital Output Buffer Supply OVDD -0.3
4.6
V
LED Driver Supply
LVDD -0.3
6.2
V
Input Voltage
VINA -0.3
AVDD+0.3 V
Storage Temperature
Tstg 65
150
C
Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
7. Recommended Operating Conditions
AVSS=OVSS=LVSS=0V. All voltages are based on ground.
Item Symbol Min. Typ. Max. Unit Remarks
Analog Supply
AVDD 3.0 3.3 3.6 V
Digital Output Buffer Supply OVDD 3.0 3.3 3.6 V
LED Driver Supply
LVDD 4.5 5.0 5.7 V
Operational Temperature
Ta 0
70 C
Normal operation is guaranteed at AVDD voltage = OVDD voltage.
All supplies must be power-up. Don’t power off partial supplies for saving consumption.
If LEDD function is unnecessary. LVDD pins can connect VSS level.
8. Electrical Characteristics
Reset timing
Fig.3 In case of internal power on reset
Prise
Prise
Poff
0.9×AVDD
Power
0.1×AVDD
Rtime
Internal Reset signal
(note) When using a power on reset circuit, the RESETB pin must connect the capacity of 0.33μF to
AVSS.
(VDDAVDD=OVDD =3.0~3.6V, Ta=0~70C)
Item
Symbol Min. Typ. Max. unit
Condition
VDD rise time
Prise
0.01
10 ms
VDD 0V period
Poff 300
ms 0V peripd
The waiting time of the
reset cancellation
Rtime
100 ms
* Start all powers at the same time.
* When VDD_0V_period can not meet this condition, Because a register isn't reset, this
014002433-E-00
-7-
2014/06

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