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NL17SV32 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 NL17SV32
기능 Single 2-Input OR Gate
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NL17SV32 데이터시트, 핀배열, 회로
NL17SV32
Single 2-Input OR Gate
The NL17SV32 is an ultra−high performance 2 input OR gate
manufactured in 0.35 mm technology with excellent performance
down to 0.9 V. This device is ideal for extremely high−speed and
high−drive applications. Additionally, limitations of board space are
no longer a constraint. The very small SOT−553 makes this device fit
most tight designs and spaces.
Features
Extremely High Speed: tPD = 1.0 ns (Typ) at VCC = 3.3 V
Designed for 0.9 to 3.3 V Operation
Overvoltage Tolerance (OVT)* Input Pins Permit Logic Translation
Balanced ±24 mA Output Drive @ 3.3 V
Near Zero Static Supply Current
Ultra−Tiny SOT−553 5 Pin Package Only 1.6 x 1.6 x 0.6 mm
These Devices are Pb−Free and are RoHS Compliant
Typical Applications
Cellular
Digital Camera
PDA
Digital Video
Important Information
High ESD Ratings for Handling:
Human Body Model: 2000 V
Machine Model: 200 V
Latchup Max Rating: 500 mA
Industry Standard
Compatible with Fairchild’s NC7SV32 and TI’s SN74AUC1G32
FUNCTION TABLE
Input A
L
L
H
H
Input B
L
H
L
H
Output Y
L
H
H
H
IN A
IN B w1 OUT Y
Figure 1. Logic Symbol
http://onsemi.com
5
1
SOT−553
CASE 463B
MARKING
DIAGRAM
UM M G
G
UM = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN DIAGRAM
A1
5 VCC
B2
GND 3
4Y
PIN ASSIGNMENT
1 Input A
2 Input B
3 GND −
4 Output Y
5 VCC −
ORDERING INFORMATION
Device
Package
Shipping
NL17SV32XV5T2G SOT−553 4000 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*Overvoltage Tolerance (OVT) enables input pins to function outside (higher) of
their operating voltages, with no damage to the devices or to signal integrity.
© Semiconductor Components Industries, LLC, 2014
May, 2014 − Rev. 5
1
Publication Order Number:
NL17SV32XV5T2/D




NL17SV32 pdf, 반도체, 판매, 대치품
NL17SV32
AC CHARACTERISTICS (Input tr = tf = 3.0 nS)
−40°C
Symbol
Parameter
Condition
VCC
TPHL,
TPLH
Propagation Delay
CL = 15 pF, RL = 1.0 MW
CL = 15 pF, RL = 2.0 kW
0.90
1.10 VCC 1.30
1.40 VCC 1.60
CL = 30 pF, RL = 500 W
1.65 VCC 1.95
2.30 VCC 2.70
2.70 VCC 3.60
CIN Input Capacitance
0
COUT Output Capacitance
0
CPD Power Dissipation
Capacitance
VI = 0 V or VCC
F = 10 MHz
0.90 to 3.60
25°C
85°C
Min Typ Max Min Max Units
13 nS
3.0 6.0 15.8 1.0 18.6 nS
1.0 3.2 8.7 1.0 9.7
1.0 2.0 6.0 1.0 6.8 nS
0.8 1.2 4.1 0.7 4.7
0.7 1.0 3.3 0.6 4.0
2.0 pF
4.5 pF
20 pF
DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES
Junction Temperature °C
Time, Hours
Time, Years
80
1,032,200
117.8
90
419,300
47.9
100 178,700 20.4
110 79,600 9.4
120 37,000 4.2
130 17,800 2.0
140 8,900 1.0
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NL17SV32

Single 2-Input OR Gate

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NL17SV32XV5T2

Single Gate 2-Input OR Gate

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