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부품번호 | 5P49V5929 기능 |
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기능 | Programmable Clock Generator | ||
제조업체 | Integrated Device Technology | ||
로고 | |||
전체 27 페이지수
Programmable Clock Generator
5P49V5929
DATASHEET
Description
The 5P49V5929 is a programmable clock generator intended
for high performance consumer, networking, industrial,
computing, and data-communications applications.
Configurations may be stored in on-chip One-Time
Programmable (OTP) memory or changed using I2C
interface. This is IDT’s fifth generation of programmable clock
technology (VersaClock® 5).
The frequencies are generated from a single reference clock.
The reference clock can come from one of the two redundant
clock inputs. A glitchless manual switchover function allows
one of the redundant clocks to be selected during normal
operation.
Two select pins allow up to 4 different configurations to be
programmed and accessible using processor GPIOs or
bootstrapping. The different selections may be used for
different operating modes (full function, partial function, partial
power-down), regional standards (US, Japan, Europe) or
system production margin testing.
The device may be configured to use one of two I2C
addresses to allow multiple devices to be used in a system.
Pin Assignment
CLKIN
CLKINB
XOUT
XIN/REF
VDDA
CLKSEL
1 24 23
22
21
20
19
18
2 17
3
EPAD
16
4
GND
15
5 14
6 13
7 8 9 10 11 12
VDDO2
OUT3
OUT4
VDDO3
OUT5
OUT6
Features
• Generates up to four independent output frequencies
• High performance, low phase noise PLL, <0.7 ps RMS
typical phase jitter on outputs
• Four fractional output dividers (FODs)
• Independent Spread Spectrum capability on each output
pair
• Four banks of internal non-volatile in-system
programmable or factory programmable OTP memory
• I2C serial programming interface
• Nine LVCMOS outputs, including one reference output
• I/O Standards:
– Single-ended I/Os: 1.8V to 3.3V LVCMOS
• Input frequency ranges:
– LVCMOS Reference Clock Input (XIN/REF) – 1MHz to
200MHz
– LVDS, LVPECL, HCSL Differential Clock Input (CLKIN,
CLKINB) – 1MHz to 200MHz
– Crystal frequency range: 8MHz to 40MHz
• Output frequency ranges:
– LVCMOS Clock Outputs – 1MHz to 200MHz
• Individually selectable output voltage (1.8V, 2.5V, 3.3V) for
each output pair
• Redundant clock inputs with manual switchover
• Programmable loop bandwidth
• Programmable slew rate control
• Programmable crystal load capacitance
• Individual output enable/disable
• Power-down mode
• 1.8V, 2.5V or 3.3V core VDDD, VDDA
• Available in 24-pin VFQFPN 4mm x 4mm package
• -40° to +85°C industrial temperature operation
24-pin VFQFPN
5P49V5929 NOVEMBER 11, 2016
1
©2016 Integrated Device Technology, Inc.
5P49V5929 DATASHEET
Number
21
22
23
Name
VDDO1
VDDD
VDDO0
Type
Power
Power
Power
24
OUT0_SEL_I2CB
Input/
Output
Internal
Pull-down
ePAD
GND
GND
Description
Output power supply. Connect to 1.8 to 3.3V. Sets output voltage levels for OUT1
and OUT2.
Digital functions power supply pin. Connect to 1.8 to 3.3V. VDDA and VDDD should
have the same voltage applied.
Power supply pin for OUT0_SEL_I2CB. Connect to 1.8 to 3.3V. Sets output voltage
levels for OUT0.
Latched input/LVCMOS Output. At power up, the voltage at the pin
OUT0_SEL_I2CB is latched by the part and used to select the state of pins 8 and 9.
If a weak pull up (10kohms) is placed on OUT0_SEL_I2CB, pins 8 and 9 will be
configured as hardware select pins, SEL1 and SEL0. If a weak pull down (10Kohms)
is placed on OUT0_SEL_I2CB or it is left floating, pins 8 and 9 will act as the SDA
and SCL pins of an I2C interface. After power up, the pin acts as a LVCMOS
reference output.
Connect to ground pad.
PROGRAMMABLE CLOCK GENERATOR
4
NOVEMBER 11, 2016
4페이지 Example 1: The crystal load capacitance is specified as 8pF
and the stray capacitance at each crystal pin is Cs=1.5pF.
Assuming equal capacitance value at XIN and XOUT, the
equation is as follows:
8pF = (9pF + 0.5pF × XTAL[5:0] + 1.5pF) / 2 →
0.5pF × XTAL[5:0] = 5.5pF → XTAL[5:0] = 11 (decimal)
Example 2: The crystal load capacitance is specified as 12pF
and the stray capacitance Cs is unknown. Footprints for
external capacitors Ce are added and a worst case Cs of 5pF
is used. For now we use Cs + Ce = 5pF and the right value for
Ce can be determined later to make 5pF together with Cs.
12pF = (9pF + 0.5pF × XTAL[5:0] + 5pF) / 2 →
XTAL[5:0] = 20 (decimal)
Manual Switchover Mode
When SM[1:0] is “0x”, the redundant inputs are in manual
switchover mode. In this mode, CLKSEL pin is used to switch
between the primary and secondary clock sources. The
primary and secondary clock source setting is determined by
the PRIMSRC bit. During the switchover, no glitches will occur
at the output of the device, although there may be frequency
and phase drift, depending on the exact phase and frequency
relationship between the primary and secondary clocks.
5P49V5929 DATASHEET
NOVEMBER 11, 2016
7 PROGRAMMABLE CLOCK GENERATOR
7페이지 | |||
구 성 | 총 27 페이지수 | ||
다운로드 | [ 5P49V5929.PDF 데이터시트 ] |
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
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DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |