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부품번호 | BLF10M6LS135 기능 |
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기능 | Power LDMOS transistor | ||
제조업체 | NXP Semiconductors | ||
로고 | |||
전체 12 페이지수
BLF10M6135; BLF10M6LS135
Power LDMOS transistor
Rev. 1 — 24 June 2014
Product data sheet
1. Product profile
1.1 General description
135 W LDMOS power transistor for industrial applications at frequencies from 700 MHz to
1000 MHz.
Table 1. Typical performance
Typical RF performance at Tcase = 25 C in a class-AB production test circuit.
Test signal
f
VDS
PL(AV)
Gp
D
(MHz)
(V) (W)
(dB) (%)
2-carrier W-CDMA
869 to 894
28 26.5
21.0 28.0
ACPR
(dBc)
39[1]
[1] Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier; carrier
spacing 5 MHz.
1.2 Features and benefits
Easy power control
Integrated ESD protection
Enhanced ruggedness
High efficiency
Excellent thermal stability
Designed for broadband operation (700 MHz to 1000 MHz)
Internally matched for ease of use
Compliant to Directive 2002/95/EC, regarding restriction of hazardous substances
(RoHS)
1.3 Applications
RF power amplifiers for ISM applications in the 700 MHz to 1000 MHz frequency range
NXP Semiconductors
BLF10M6135; BLF10M6LS135
Power LDMOS transistor
7.2 Test circuit information
input
50 Ω
VGG
R1
C3
C4
R2
C1
C2
C5
C8 C9 C10 C11 C18
R3
L1
C6
C7
C12 C13 C14 C15 C19
The drawing is not to scale.
Fig 1. Test circuit for operation at 800 MHz
VDD
C20
C17
C16
output
50 Ω
001aah869
R1
C3
C8 C9
C18
L1 C20
C10 C11
Q1
R3
C4
R2
C1 C2 C5
C6
C7
C17
C19 C16
IN
800 -1000 MHz
V1.0
C14 C15
C12 C13
OUT
800 -1000 MHz
V1.0
001aah870
Fig 2.
The striplines are on a double copper-clad Taconic RF35 Printed-Circuit Board (PCB) with r = 3.5 and thickness = 0.76 mm.
See Table 9 for list of components.
The drawing is not to scale.
Component layout
BLF10M6135_BLF10M6LS135
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 24 June 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
4 of 12
4페이지 NXP Semiconductors
BLF10M6135; BLF10M6LS135
Power LDMOS transistor
8. Package outline
Flanged ceramic package; 2 mounting holes; 2 leads
SOT502A
D
A
F
3
D1
U1
q
1
B
C
L
c
H U2
A
2
b
p E1
w1 M A M B M
E
w2 M C M
Q
0 5 10 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
UNIT A
b
c
D D1 E E1 F
H
L
p
Q q U1 U2 w1
mm
4.72 12.83 0.15 20.02 19.96 9.50
3.43 12.57 0.08 19.61 19.66 9.30
9.53
9.25
1.14 19.94 5.33
0.89 18.92 4.32
3.38
3.12
1.70
1.45
27.94 34.16
33.91
9.91
9.65
0.25
inches
0.186
0.135
0.505 0.006
0.495 0.003
0.788 0.786
0.772 0.774
0.374 0.375
0.366 0.364
0.045 0.785
0.035 0.745
0.210 0.133
0.170 0.123
0.067
0.057
1.100
1.345
1.335
0.390
0.380
0.01
w2
0.51
0.02
OUTLINE
VERSION
SOT502A
IEC
Fig 8. Package outline SOT502A
REFERENCES
JEDEC
JEITA
BLF10M6135_BLF10M6LS135
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 24 June 2014
EUROPEAN
PROJECTION
ISSUE DATE
03-01-10
12-05-02
© NXP Semiconductors N.V. 2014. All rights reserved.
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BLF10M6LS135 | Power LDMOS transistor | NXP Semiconductors |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |