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PDF PUSB2X4D Data sheet ( Hoja de datos )

Número de pieza PUSB2X4D
Descripción ESD protection
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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PUSB2X4D
ESD protection for high-speed interfaces
Rev. 1 — 5 November 2013
Product data sheet
1. Product profile
1.1 General description
The device is designed to protect high-speed interfaces such as USB 2.0 ports against
ElectroStatic Discharge (ESD).
The device includes four high-level ESD protection diode structures for high-speed signal
lines. It is encapsulated in a small SOT457 (SC-74) Surface-Mounted Device (SMD)
plastic package.
All signal lines are protected by a special diode configuration offering ultra low line
capacitance of 0.85 pF maximum. This configuration provides protection to downstream
components from ESD voltages up to 12 kV contact according to IEC 61000-4-2, level 4.
1.2 Features and benefits
System ESD protection for USB 2.0
All signal lines with integrated rail-to-rail clamping diodes for downstream
ESD protection of 12 kV according to IEC 61000-4-2, level 4
Line capacitance of 0.85 pF maximum for each channel
1.3 Applications
The device is designed for receiver and transmitter port protection in:
Portable devices
TVs, monitors
DVD recorders and players
Notebooks, mother boards, graphic cards and ports
Set-top boxes and game consoles

1 page




PUSB2X4D pdf
NXP Semiconductors
PUSB2X4D
ESD protection for high-speed interfaces
6
IPP
(A)
4
aaa-009808
0
IPP
(A)
-2
aaa-009809
2 -4
0
012345
VCL (V)
Fig 4.
IEC 61000-4-5; tp = 8/20 s; positive pulse
Dynamic resistance with positive clamping;
typical values
15
I
(A)
12
aaa-009810
-6
-3 -2 -1 0
VCL (V)
Fig 5.
IEC 61000-4-5; tp = 8/20 s; negative pulse
Dynamic resistance with negative clamping,
typical values
0
I
(A)
-3
aaa-009811
9 -6
6 -9
3 -12
0
0 4 8 12
VCL (V)
Fig 6.
tp = 100 ns; Transmission Line Pulse (TLP)
Dynamic resistance with positive clamping,
typical values
-15
-8 -6 -4 -2 0
VCL (V)
Fig 7.
tp = 100 ns; Transmission Line Pulse (TLP)
Dynamic resistance with negative clamping;
typical values
The device uses an advanced clamping structure, which shows a negative dynamic
resistance. This snap-back behavior strongly reduces the clamping voltage to the system
behind the ESD protection during an ESD event. Do not connect unlimited DC current
sources to the data lines to avoid keeping the ESD protection device in snap-back state
after exceeding breakdown voltage (due to an ESD pulse for instance).
PUSB2X4D
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 5 November 2013
© NXP B.V. 2013. All rights reserved.
5 of 11

5 Page





PUSB2X4D arduino
NXP Semiconductors
12. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 8
10 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 9
10.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 9
10.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
10.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
10.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
11 Contact information. . . . . . . . . . . . . . . . . . . . . 10
12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PUSB2X4D
ESD protection for high-speed interfaces
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 5 November 2013
Document identifier: PUSB2X4D

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