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PDF PUSB3FR4 Data sheet ( Hoja de datos )
| Número de pieza | PUSB3FR4 | |
| Descripción | ESD protection | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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PUSB3FR4
ESD protection for ultra high-speed interfaces
Rev. 1 — 26 January 2015
Product data sheet
1. Product profile
1.1 General description
The device is designed to protect high-speed interfaces such as SuperSpeed USB 3.1 at
10 Gbps, High-Definition Multimedia Interface (HDMI), DisplayPort, external Serial
Advanced Technology Attachment (eSATA) and Low Voltage Differential Signaling (LVDS)
interfaces against ElectroStatic Discharge (ESD).
The device includes four high-level ESD protection diode structures. They protect
sensitive transmitters and receivers for ultra high-speed signal lines. The device is
encapsulated in a leadless small DFN2510A-10 (SOT1176-1) plastic package.
All signal lines are protected by a special diode configuration offering ultra low line
capacitance of only 0.29 pF. These diodes utilize a snap-back structure in order to provide
protection to downstream components from ESD voltages up to 15 kV contact exceeding
IEC 61000-4-2, level 4.
1.2 Features and benefits
System-level ESD protection for USB 2.0 and SuperSpeed USB 3.1 at 10 Gbps,
HDMI, DisplayPort, eSATA and LVDS
Line capacitance of only 0.29 pF for each channel
Outstanding system protection: extremely deep snap-back combined with dynamic
resistance of only 0.27 .
All signal lines with integrated rail-to-rail clamping diodes for downstream
ESD protection of 15 kV exceeding IEC 61000-4-2, level 4
Matched 0.5 mm trace spacing
Signal lines with 0.05 pF matching capacitance between signal pairs
Design-friendly ‘pass-through’ signal routing
1.3 Applications
The device is designed for high-speed receiver and transmitter port protection:
Smartphones, tablet computers, Mobile Internet Devices (MID) and portable devices
TVs and monitors
DVD recorders and players
Notebooks, main board graphic cards and ports
Set-top boxes and game consoles
1 page  
NXP Semiconductors
PUSB3FR4
ESD protection for ultra high-speed interfaces
aaa-016318
Fig 5.
Data rate: 10 Gbit/s
Vertical scale: 175 mV/div
Horizontal scale: 20 ps/div
USB 3.1 eye diagram, Printed-Circuit Board (PCB) with PUSB3FR4
Fig 6.
Data rate: 10 Gbit/s
Vertical scale: 175 mV/div
Horizontal scale: 20 ps/div
USB 3.1 eye diagram, PCB without PUSB3FR4 (reference)
aaa-016319
PUSB3FR4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 26 January 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
5 of 15
5 Page 
NXP Semiconductors
9. Soldering
PUSB3FR4
ESD protection for ultra high-speed interfaces
Footprint information for reflow soldering of DFN2510A-10 package
SOT1176-1
Hx
Hy Ay By
C
0.05
D P 0.05
Generic footprint pattern
Refer to the package outline drawing for actual layout
solder land
solder paste deposit
solder land plus solder paste
occupied area
solder resist
Dimensions in mm
P Ay By
C
0.5 1.25 0.3 0.475
D
0.2
Hx
2.45
Hy
1.5
Remark:
Stencil of 75 μm is recommended.
A stencil of 75 μm gives an aspect ratio of 0.77
With a stencil of 100 μm one will obtain an aspect ratio of 0.58
Fig 17. Reflow soldering footprint DFN2510A-10 (SOT1176-1)
sot1176-1_fr
PUSB3FR4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 26 January 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
11 of 15
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| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet PUSB3FR4.PDF ] | |
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