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Número de pieza | ISL23318 | |
Descripción | 128-taps Low Voltage Digitally Controlled Potentiometer | |
Fabricantes | Intersil | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de ISL23318 (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
No Preview Available ! Single, 128-taps Low Voltage Digitally Controlled
Potentiometer (XDCP™)
ISL23318
The ISL23318 is a volatile, low voltage, low noise, low power,
I2C Bus™, 128 Taps, single digitally controlled potentiometer
(DCP), which integrates DCP core, wiper switches and control
logic on a monolithic CMOS integrated circuit.
The digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. The potentiometer has an associated
volatile Wiper Register (WR) that can be directly written to and
read by the user. The contents of the WR controls the position
of the wiper. When powered on, the ISL23318’s wiper will
always commence at mid-scale (64 tap position).
The low voltage, low power consumption, and small package
of the ISL23318 make it an ideal choice for use in battery
operated equipment. In addition, the ISL23318 has a VLOGIC
pin allowing down to 1.2V bus operation, independent from the
VCC value. This allows for low logic levels to be connected
directly to the ISL23318 without passing through a voltage
level shifter.
The DCP can be used as a three-terminal potentiometer or as a
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal
processing.
Features
• 128 resistor taps
• I2C serial interface
- No additional level translator for low bus supply
- Two address pins allow up to four devices per bus
• Power supply
- VCC = 1.7V to 5.5V analog power supply
- VLOGIC = 1.2V to 5.5V I2C bus/logic power supply
• Wiper resistance: 70Ω typical @ VCC = 3.3V
• Shutdown Mode - forces the DCP into an end-to-end open
circuit and RW is shorted to RL internally
• Power-on preset to mid-scale (64 tap position)
• Shutdown and standby current <2.8µA max
• DCP terminal voltage from 0V to VCC
• 10kΩ, 50kΩ or 100kΩ total resistance
• Extended industrial temperature range: -40°C to +125°C
• 10 Ld MSOP or 10 Ld UTQFN packages
• Pb-free (RoHS compliant)
Applications
• Gain adjustment in battery powered instruments
• Trimming sensor circuits
• Power supply margining
• RF power amplifier bias compensation
10000
8000
6000
4000
2000
0
0 32 64 96 128
TAP POSITION (DECIMAL)
FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP
POSITION, 10k DCP
VREF
RH
ISL23318
RW
RL
-
+
ISL28114
VREF_M
FIGURE 2. VREF ADJUSTMENT
July 26, 2011
FN7887.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners
1 page ISL23318
Analog Specifications VCC = 2.7V to 5.5V, VLOGIC = 1.2V to 5.5V over recommended operating conditions unless otherwise stated.
Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 20)
TYP
(Note 8)
MAX
(Note 20)
UNITS
VOLTAGE DIVIDER MODE (0V @ RL; VCC @ RH; measured at RW, unloaded)
INL Integral Non-linearity, Guaranteed
(Note 13) Monotonic
W, U, T options
-0.5
±0.15
+0.5
LSB
(Note 9)
DNL Differential Non-linearity, Guaranteed W, U, T options
(Note 12) Monotonic
-0.5
±0.15
+0.5
LSB
(Note 9)
FSerror Full-scale Error
(Note 11)
W option
-2.5 -1.5
0 LSB
(Note 9)
U, T option
-1.0 -0.7
0 LSB
(Note 9)
ZSerror Zero-scale Error
(Note 10)
W option
0 1.5 2.5 LSB
(Note 9)
U, T option
0 0.7 1.0 LSB
(Note 9)
TCV Ratiometric Temperature Coefficient
(Notes 14)
W option, Wiper Register set to 40 hex
U option, Wiper Register set to 40 hex
8
4
ppm/°C
ppm/°C
T option, Wiper Register set to 40 hex 2.3 ppm/°C
Large Signal Wiper Settling Time
From code 0 to 7F hex
300 ns
fcutoff -3dB Cutoff Frequency
Wiper at middle point W option
Wiper at middle point U option
1200
250
kHz
kHz
Wiper at middle point T option
120 kHz
RHEOSTAT MODE (Measurements between RW and RL pins with RH not connected, or between RW and RH with RL not connected)
RINL Integral Non-linearity, Guaranteed
(Note 18) Monotonic
W option; VCC = 2.7V to 5.5V
-1.0
±0.5
+1.0
MI
(Note 15)
W option; VCC = 1.7V
±3.0
MI
(Note 15)
U, T option; VCC = 2.7V to 5.5V
-0.5
±0.15
+0.5
MI
(Note 15)
U, T option; VCC = 1.7V
±1.0
MI
(Note 15)
RDNL Differential Non-linearity, Guaranteed W option; VCC = 2.7V to 5.5V
(Note 17) Monotonic
-0.5
±0.15
+0.5
MI
(Note 15)
W option; VCC = 1.7V
±0.4
MI
(Note 15)
U, T option; VCC = 2.7V to 5.5V
-0.5
±0.15
+0.5
MI
(Note 15)
U, T option; VCC = 1.7V
±0.4
MI
(Note 15)
Roffset Offset, Wiper at 0 Position
(Note 16)
W option; VCC = 2.7V to 5.5V
0
1.8 3.0
MI
(Note 15)
W option; VCC = 1.7V
3.0 MI
(Note 15)
U, T option; VCC = 2.7V to 5.5V
0 0.3 1 MI
(Note 15)
U, T option; VCC = 1.7V
0.5 MI
(Note 15)
5 FN7887.0
July 26, 2011
5 Page ISL23318
Typical Performance Curves (Continued)
60
+25°C
50
+125°C
40
30
20
-40°C
10
50
40
30
20
10
+25°C
+125°C
-40°C
0
0 16 32 48 64 80 96 112 128
TAP POSITION (DECIMAL)
FIGURE 11. 10k WIPER RESISTANCE vs TAP POSITION, VCC = 5V
0
0 16 32 48 64 80 96 112 128
TAP POSITION (DECIMAL)
FIGURE 12. 50k WIPER RESISTANCE vs TAP POSITION, VCC = 5V
140
120
100
80
60
40
20
0
16
32 48 64 80 96 112
TAP POSITION (DECIMAL)
FIGURE 13. 10k TCv vs TAP POSITION
128
30
25
20
15
10
5
0
16
32 48 64 80 96 112
TAP POSITION (DECIMAL)
FIGURE 14. 50k TCv vs TAP POSITION
128
350
300
250
200
150
100
50
016
32 48 64 80 96
TAP POSITION (DECIMAL)
FIGURE 15. 10k TCr vs TAP POSITION
112
128
11
100
75
50
25
016 32 48 64 80 96 112 128
TAP POSITION (DECIMAL)
FIGURE 16. 50k TCr vs TAP POSITION
FN7887.0
July 26, 2011
11 Page |
Páginas | Total 19 Páginas | |
PDF Descargar | [ Datasheet ISL23318.PDF ] |
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