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PDF CMX7164 Data sheet ( Hoja de datos )
| Número de pieza | CMX7164 | |
| Descripción | Multi Mode Modem | |
| Fabricantes | Consumer Microcircuits Limited | |
| Logotipo |  |
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CML Microcircuits
COMMUNICATION SEMICONDUCTORS
CMX7164
Multi Mode Modem
DATASHEETD/7164_FI-1.x/FI-2.x/FI-4.x/FI-6.x/22 May 2015
Provisional Issue
7164FI-1.x, 7164FI-2.x, 7164FI-4.x and 7164FI-6.x Multi Mode Modem
Features
Half-duplex modem supports multiple
modulations and channel spacings
7164FI-1.x
o GMSK/GFSK with BT=0.5, 0.3, 0.27 or 0.25
o Over-air compatible with FX/MX909B and
CMX7143FI-1.x
o Two frame sync detectors
o Automatic frame sync detect
o Rx carrier frequency correction
o Receive signal quality measurement
7164FI-2.x
o 2/4/8/16-FSK up to 10ksymbols/s in 25kHz e.g.
40kbps for 16-FSK
o Compatible FEC for CMX7143 and FX/MX919B
4-FSK (not 2-FSK)
o Over-air compatibility with CMX969 for RD-LAP
Tx/Rx
o Two frame sync detectors
o Automatic frame sync detect
o Rx carrier frequency correction
o Receive signal quality measurement
7164FI-4.x
o 4/16/64 QAM up to 96kbps in 25kHz
o Different rate, robust FEC choices
o Channel estimation and equalisation
o Two frame sync detectors
o Automatic frame sync detect
o Rx carrier frequency and phase correction
o Receive signal quality measurement
7164FI-6.x
o V.23 modulation
o Two frame sync detectors
o Automatic frame sync detect
o Rx carrier frequency correction
o Receive signal quality measurement
High Performance I/Q Radio Analogue
Interface
o Tx and Rx: ‘direct connect’ to zero IF transceiver
o Simple external RC filters
o Digital IF filter reconfigures for multiple RF
channel spacings (Rx)
o Deviation control without manual trim (Tx)
o I/Q trims
C-BUS host Serial Interface
o SPI-like with register addressing
o Read/Write 128-byte FIFOs and data buffers
streamline transfers and relax host service
latency
Auxiliary Functions
o Four 10-bit DACs
o Autonomous RAMDAC sequencer
o Automatic support for dc calibration of CMX998
o Four 10-bit ADCs
o ADC averaging and trip on high/low ‘watch’
modes
o Four GPIO
o Sequence GPIO on Tx or Rx trigger
o Start Tx on digital trigger input
Master C-BUS/SPI Serial Interface
o For external slave devices e.g. RF transceiver
and synthesiser
o Pass-through mode expands host C-BUS/SPI
capacity
Two Synthesised Clock Generators
Low Power 3.3V Operation with Powersave
Functions
Small 64-pin VQFN and LQFP Packages
Applications
High Performance Narrowband Data Radio
o Telemetry/SCADA/data modems
o 6.25kHz to 25kHz RF channel spacing
o Compatible worldwide e.g. ETSI, FCC, ARIB, etc.
o FCC Part 90 per new spectral efficiency
requirements
Digital Software Defined Radio (SDR)
High-speed Wireless Data
Mobile Data over Fading Channels
V.23 compatibility for interoperability with legacy
equipment in the field
2015 CML Microsystems Plc
1 page  
CMX7164 Multi Mode Modem
CMX7164
7.4.19 Auxiliary ADC Operation ...................................................................................... 52
7.4.20 Auxiliary DAC/RAMDAC Operation...................................................................... 52
7.4.21 SPI Thru-Port ....................................................................................................... 53
7.4.22 SPI/C-BUS AGC .................................................................................................. 54
7.5 Digital System Clock Generators................................................................................ 56
7.5.1 Main Clock Operation........................................................................................... 57
7.5.2 System Clock Operation ...................................................................................... 58
7.6 Signal Level Optimisation ........................................................................................... 58
7.6.1 Transmit Path Levels And Ramping .................................................................... 59
7.6.2 Receive Path Levels............................................................................................. 59
7.7 C-BUS Register Summary.......................................................................................... 60
8 7164FI-1.x Features ............................................................................................................... 61
8.1 7164FI-1.x Modulation ................................................................................................ 61
8.2 7164FI-1.x Radio Interface ......................................................................................... 61
8.2.1 I/Q Transmit and I/Q Receive Interfaces.............................................................. 61
8.2.2 Two-point Modulation Transmit with I/Q Receive Interface ................................. 63
8.3 7164FI-1.x Formatted Data ........................................................................................ 64
8.4 7164FI-1.x Typical Transmit Performance ................................................................. 65
8.5 7164FI-1.x Typical Receive Performance .................................................................. 70
8.5.1 Signal-to-Noise and Co-channel Performance .................................................... 70
9 7164FI-2.x Features ............................................................................................................... 74
9.1 7164FI-2.x Modulation ................................................................................................ 74
9.2 7164FI-2.x Radio Interface ......................................................................................... 76
9.2.1 I/Q Transmit and I/Q Receive Interfaces.............................................................. 76
9.2.2 Two-point Modulation Transmit with I/Q Receive Interface ................................. 78
9.3 7164FI-2.x Formatted Data ........................................................................................ 79
9.4 7164FI-2.x Receiver Response Equaliser .................................................................. 83
9.5 7164FI-2.x Typical Transmit Performance ................................................................. 84
9.6 7164FI-2.x Typical Receive Performance .................................................................. 91
9.6.1 4-FSK ................................................................................................................... 91
9.6.2 8-FSK and 16-FSK............................................................................................... 95
9.6.3 Receiver Dynamic Range .................................................................................... 99
9.6.4 Receiver Response Equaliser Performance ........................................................ 99
10 7164FI-4.x Features ............................................................................................................. 104
10.1 7164FI-4.x Modulation .............................................................................................. 104
10.2 7164FI-4.x Radio Interface ....................................................................................... 105
10.2.1 Control interfaces ............................................................................................... 105
10.3 7164FI-4.x Formatted Data ...................................................................................... 106
10.4 7164FI-4.x Receiver Response Equaliser ................................................................ 107
10.5 7164FI-4.x Typical Transmit Performance ............................................................... 109
10.6 7164FI-4.x Typical Receive Performance ................................................................ 114
10.6.1 Signal-to-Noise and Co-channel Performance .................................................. 114
10.6.2 Adjacent Channel Performance ......................................................................... 118
10.6.3 Receiver Dynamic Range .................................................................................. 119
10.6.4 Receiver Response Equaliser Performance ...................................................... 119
11 7164FI-6.x Features ............................................................................................................. 125
2015 CML Microsystems Plc
Page 5
D/7164_FI-1.x/FI-2.x/FI-4.x/FI-6.x/22
5 Page 
CMX7164 Multi Mode Modem
CMX7164
16/17
14/15
11/12/
13
10
9
8
7
6
5
4
Update of graphs to improve datasheet clarity in v14. Datasheet becomes v16. 21/10/13
Added details of FI-2 Equaliser operation
Added programming register control for I/Q dc offset acquisition
Added corrections to framesync programming register description
Added power connection to pin 37 in Figure 7
Enhancements for custom filter support
Added payload byte lengths to Tables 3, 4, 5 and 6
Document formatting corrected and typos/clarifications
Added RD-LAP channel coding block types in FI-2.x
Clarification of FI-1.x channel coding
Add 8-FSK and 16-FSK operation in FI-2.x
01/08/13
15/03/13
10/01/13
Add GMSK/GFSK operation in FI-1.x
30/4/12
Added details of FI-4 Equaliser operation and control: Mode register,
programming block
Added details of programming block read mechanism (Available for selected
programming registers only)
Updated receive performance curves for FI-4
Added description of soft decision output bits for FI-2 only
Added details of bus hold function for unused inputs
Added details of Core regulator select
Corrected conditions under which current measurements were made
Changed reference to input impedance of I/Q INPUTs
Typos/clarifications
Remove constraint on use of document with FI-2.x, as the latter is now
updated.
Advice in section 5.5 greyed out as not implemented in current FI.
Added advice about terminating unconnected GPIO pins in section 5.5
Added details of default and inverting gains to the description of the I/Q Output
Control - $5D, $5E registers
Pointed out correct use of handshaking when using signal control (Register
$61) to select I and Q offset measurements (Registers $75 and $76)
Clarified behaviour of the I and Q offset registers (Rx dc offset correction) when
using automatic Rx IQ dc mode
Clarified behaviour and scaling of RSSI measurements
Documented further AGC controls added in FI-4.0.5.4, and described AGC
operation in detail
Documented the Pll On bit added to the mode register in FI-4.0.5.4, which
provides a fast idle mode for programming register modifications without
powersave, but with improved speed
Added parameters in Program Block 1 to reduce delay when transitioning from
Idle to Tx or Rx modes
Added information about receive dynamic range
Corrected and clarified scaling of Tx output fine control.
9/1/12
21/09/11
22/08/11
17/8/11
3/8/11
2015 CML Microsystems Plc
Page 11
D/7164_FI-1.x/FI-2.x/FI-4.x/FI-6.x/22
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CMX7164.PDF ] | |
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