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PDF LPC822 Data sheet ( Hoja de datos )
| Número de pieza | LPC822 | |
| Descripción | 32-bit ARM Cortex-M0+ microcontroller | |
| Fabricantes | NXP Semiconductors | |
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LPC82x
32-bit ARM Cortex-M0+ microcontroller; up to 32 kB flash and
8 kB SRAM; 12-bit ADC; comparator
Rev. 1 — 1 October 2014
Product data sheet
1. General description
The LPC82x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at
CPU frequencies of up to 30 MHz. The LPC82x support up to 32 KB of flash memory and
8 KB of SRAM.
The peripheral complement of the LPC82x includes a CRC engine, four I2C-bus
interfaces, up to three USARTs, up to two SPI interfaces, one multi-rate timer,
self-wake-up timer, and state-configurable timer with PWM function (SCTimer/PWM), a
DMA, one 12-bit ADC and one analog comparator, function-configurable I/O ports through
a switch matrix, an input pattern match engine, and up to 29 general-purpose I/O pins.
For additional documentation related to the LPC82x parts, see Section 18.
2. Features and benefits
System:
ARM Cortex-M0+ processor (revision r0p1), running at frequencies of up to
30 MHz with single-cycle multiplier and fast single-cycle I/O port.
ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).
System tick timer.
AHB multilayer matrix.
Serial Wire Debug (SWD) with four break points and two watch points. JTAG
boundary scan (BSDL) supported.
MTB
Memory:
Up to 32 KB on-chip flash programming memory with 64 Byte page write and
erase. Code Read Protection (CRP) supported.
8 KB SRAM.
ROM API support:
Boot loader.
On-chip ROM APIs for ADC, SPI, I2C, USART, power configuration (power
profiles) and integer divide.
Flash In-Application Programming (IAP) and In-System Programming (ISP).
Digital peripherals:
High-speed GPIO interface connected to the ARM Cortex-M0+ IO bus with up to 29
General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors,
programmable open-drain mode, input inverter, and digital filter. GPIO direction
control supports independent set/clear/toggle of individual bits.
High-current source output driver (20 mA) on four pins.
1 page  
NXP Semiconductors
6. Block diagram
LPC82x
32-bit ARM Cortex-M0+ microcontroller
LPC82xM
SWCLK, SWD
29 x
PIO0 HIGH-SPEED
GPIO
PIN INTERRUPTS/
PATTERN MATCH
TEST/DEBUG
INTERFACE
ARM
CORTEX-M0+ FLASH
16/32 KB
SRAM
4/8 KB
ROM
slave
slave
slave
SCT_PIN[3:0]
SCTIMER/
PWM
AHB-LITE BUS
SCT_OUT[6:0]
slave
slave
master
AHB TO APB
BRIDGE
CRC
DMA
TXD, RTS
RXD, CTS
SCLK
USART0/1/2
SCK, SSEL
29 x SWITCH MISO, MOSI
MATRIX
SPI0/1
SCL
SDA
I2C0/1/2/3
XTALOUT
XTALIN XTAL
RESET, CLKIN
CLKOUT
SYSCON
WWDT
IOCON
MULTI-RATE TIMER
PMU
SELF
WAKE-UP TIMER
ALWAYS-ON POWER DOMAIN
ADC_[11:0]
ADC
ACMP_I[4:1]
VDDCMP
ACMP_O
COMPARATOR
IRC
WDOsc
BOD
POR
CLOCK
GENERATION,
POWER CONTROL,
SYSTEM
FUNCTIONS
clocks and
controls
aaa-014399
Gray-shaded blocks show peripherals that can provide hardware triggers or fixed DMA requests for DMA transfers.
Fig 3. LPC82x block diagram
LPC82x
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 1 October 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
5 of 81
5 Page 
NXP Semiconductors
LPC82x
32-bit ARM Cortex-M0+ microcontroller
Table 4. Movable functions (assign to pins PIO0_0 to PIO0_28 through switch matrix)
Function name
Type Description
SPI1_MISO
I/O Master In Slave Out for SPI1.
SPI1_SSEL0
I/O Slave select 0 for SPI1.
SPI1_SSEL1
I/O Slave select 1 for SPI1.
SCT_PIN0
I Pin input 0 to the SCT input multiplexer.
SCT_PIN1
I Pin input 1 to the SCT input multiplexer.
SCT_PIN2
I Pin input 2 to the SCT input multiplexer.
SCT_PIN3
I Pin input 3 to the SCT input multiplexer.
SCT_OUT0
O SCT output 0.
SCT_OUT1
O SCT output 1.
SCT_OUT2
O SCT output 2.
SCT_OUT3
O SCT output 3.
SCT_OUT4
O SCT output 4.
SCT_OUT5
O SCT output 5.
I2C1_SDA
I/O I2C1-bus data input/output.
I2C1_SCL
I/O I2C1-bus clock input/output.
I2C2_SDA
I/O I2C2-bus data input/output.
I2C2_SCL
I/O I2C2-bus clock input/output.
I2C3_SDA
I/O I2C3-bus data input/output.
I2C3_SCL
I/O I2C3-bus clock input/output.
ADC_PINTRIG0
I
ADC external pin trigger input 0.
ADC_PINTRIG1
I
ADC external pin trigger input 1.
ACMP_O
O Analog comparator output.
CLKOUT
O Clock output.
GPIO_INT_BMAT O
Output of the pattern match engine.
LPC82x
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 1 October 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
11 of 81
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LPC822.PDF ] | |
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