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PDF DAP005 Data sheet ( Hoja de datos )
| Número de pieza | DAP005 | |
| Descripción | Advanced transition-mode PFC controller | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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DAP005
Features
Advanced transition-mode PFC controller
Custom Data
■ Transition-mode control of PFC pre-regulators
■ Very precise adjustable output overvoltage
protection
■ Tracking boost function
■ Protection against feedback loop failure
(Latched shutdown)
■ Interface for cascaded converter's PWM
controller
■ Input voltage feedforward (1/V2)
■ AC brownout protection
■ Low (≤ 90µA) start-up current
■ < 5mA quiescent current
■ 1.4% (@ TJ = 25°C) internal reference voltage
■ -600/+800 mA totem pole gate driver with
active pull-down during UVLO
■ SO14 package
SO-14
Applications
PFC pre-regulators for:
■ HI-END AC-DC adapter/charger
■ Desktop PC, server, WEB server
■ IEC61000-3-2 OR JEIDA-MITI compliant
SMPS, in excess of 250W
Table 1. Device summary
Part number
Package
DAP005
SO-14
DAP005TR
SO-14
Packaging
Tube
Tape & Reel
Figure 1.
Block diagram
TBO
VCC
GND
ZCD
AC_OK
TRACKING
BOOST
6 1:1
CURRENT
MIRROR
1:1
BUFFER
3V
14
INV
1
2.5V
-
+
VOLTAGE
from REGULATOR
VFF
COMP
MULT
VFF
23
5
1/V2
Ideal diode
LINE VOLTAGE
MULTIPLIER
FEEDFORWARD
Voltage
references
-+
1.7V
-+
LEADING-EDGE
BLANKING
4
Vbias
(INTERNAL SUPPLY BUS)
INDUCTOR
SATURATION
DETECTION
Q
SAT
VCC
CS
12
11
1.4V
0.7V
UVLO
R1 COMPARATOR
+
R2
-
VREF2
UVLO
ZERO CURRENT
DETECTOR
RQ
S
15 V
Driver
Starter
OFF
STARTER
13
GD
0.2V
0.26V
10
-
0.52V
0.6V
ON/OFF CONTROL
(BROWNOUT DETECTION)
DISABLE
9
PWM_STOP
LATCH
SAT
Vbias
8
FEEDBACK
FAILURE
PROTECTION
PWM_LATCH
PFC_OK
7
2.5V
February 2007
Rev 1
This is a document intended for a specific Customer. It must not be released without first contacting Division marketing.
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www.st.com
39
1 page  
DAP005
Description
Table 2. Pin description (continued)
Pin N° Name
Description
Tracking Boost function. This pin provides a buffered VFF voltage. A resistor connected
6
TBO
between this pin and GND defines a current that is sunk from pin INV (pin 1). In this way,
the output voltage is changed proportionally to the mains voltage (tracking boost). If this
function is not used leave this pin open.
PFC pre-regulator output voltage monitoring/disable function. This pin senses the output
voltage of the PFC pre-regulator through a resistor divider and is used for protection
purposes. If the voltage at the pin exceeds 2.5V the IC is shut down, its consumption goes
almost to the start-up level and this condition is latched. PWM_LATCH pin is asserted high.
7 PFC_OK Normal operation can be resumed only by cycling the Vcc. This function is used for
protection in case the feedback loop fails.
If the voltage on this pin is brought below 0.2V the IC is shut down and its consumption is
considerably reduced. To restart the IC the voltage on the pin must go above 0.26V. If these
functions are not needed, tie the pin to a voltage between 0.26 and 2.5 V.
Output pin for fault signaling. During normal operation this pin features high impedance. If
either a voltage above 2.5V at PFC_OK (pin 7) or a voltage above 1.7V on CS (pin 4) is
8 PWM_LATCH detected the pin is asserted high. Normally, this pin is used to stop the operation of the DC-
DC converter supplied by the PFC pre-regulator by invoking a latched disable of its PWM
controller. If not used, the pin will be left floating.
Output pin for fault signaling. During normal operation this pin features high impedance. If
the IC is disabled by a voltage below 0.5V on AC_OK (pin 10) the voltage at the pin is
9 PWM_STOP pulled to ground. Normally, this pin is used to temporarily stop the operation of the DC-DC
converter supplied by the PFC pre-regulator by disabling its PWM controller. If not used,
the pin will be left floating.
Brownout protection put. A voltage below 0.52V shuts down (not latched) the IC and brings
its consumption to a considerably lower level. PWM_STOP is asserted low. The IC restarts
10 AC_OK as the voltage at the pin goes above 0.6V. Connect this pin to VFF (pin 5) either directly or
through a resistor divider to use this function as brownout (AC mains undervoltage)
protection, tie to INV (pin 1) if the function is not used.
11
ZCD
Boost inductor’s demagnetization sensing input for transition-mode operation. A negative-
going edge triggers MOSFET’s turn-on.
12
GND
Ground. Current return for both the signal part of the IC and the gate driver.
Gate driver output. The totem pole output stage is able to drive power MOSFET’s and
13 GD IGBT’s with a peak current of 600 mA source and 800 mA sink. The high-level voltage of
this pin is clamped at about 12V to avoid excessive gate voltages.
14
VCC
Supply Voltage of both the signal part of the IC and the gate driver.
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5 Page 
DAP005
5 Typical electrical performance
Typical electrical performance
Figure 4. Supply current vs supply voltage
Icc
(mA)
10
5
1
0.5
0.1
0.05
0.01
0.005
Co = 1nF
f = 70 kHz
Tj = 25°C
0
0 5 10 15 20 25
Vcc(V)
Figure 6. IC consumption vs TJ
Icc 10
(mA)
5
2
Operating
Quiescent
1
Vcc = 12 V
0.5 Co = 1 nF
f = 70 kHz
0.2
Disabled or
during OVP
Latched off
0.1
0.05 Before start-up
0.02
-50 0 50 100 150
Tj (°C)
Figure 8. Start-up & UVLO vs TJ
12.5
VCC-ON
(V) 12
11.5
11
10.5
10
VCC-OFF 9.5
(V)
9
-50
0 50
Tj (°C)
100
150
Figure 5. VCC Zener voltage vs TJ
Vccz (pin 14)
(V) 28
27
26
25
24
23
22
-50
0 50 100 150
Tj (°C)
Figure 7. Feedback reference vs TJ
VREF (pin 1)
(V) 2.6
2.55
Vcc = 12 V
2.5
2.45
2.4
-50
0 50 100 150
Tj (°C)
Figure 9. E/A output clamp levels vs TJ
VCOMP (pin 2)
7
(V)
6 Upper clamp
5
Vcc = 12 V
4
3
2 Lower clamp
1
-50 0
50
Tj (°C)
100
150
11/39
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DAP005.PDF ] | |
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