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STDVE103A 데이터시트 PDF




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부품번호 STDVE103A 기능
기능 Adaptive 3.4 Gbps 3:1 TMDS/HDMI signal equalizer
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STDVE103A 데이터시트, 핀배열, 회로
STDVE103A
Adaptive 3.4 Gbps 3:1 TMDS/HDMI signal equalizer
Preliminary Data
Features
Digital video signal equalizer with 3:1 HDMI
switch
Compatible with the high-definition multimedia
interface (HDMI) v1.3 digital interface
340 MHz maximum clock speed operation
supports all video formats with deep color at
maximum refresh rates
3.4 Gbps data rate per channel
Fully automatic adaptive equalizer for cable
lengths up to 25 m
Selectable 50 Ω input termination to VCC:
3.135 to 3.465 V
Low speed control lines supply to VDD :
5 V (typ)
ESD HBM model : > ±5 KV for all I/Os
Integrated open-drain I2C buffer for display
data channel (DDC)
5.3 V tolerant DDC and HPD I/Os
Lock-up free operation of I2C bus
0 to 400 kHz clock frequency for I2C bus
Low capacitance TMDS channels
Equalizer for signal regeneration
Low output skew and jitter
Applications
Advanced TVs supporting the HDMI/DVI
standard
Front projectors, LCD TVs and PDPs
Monitors and notebooks
Set-top box and DVD players
TQFP64
Description
The STDVE103A integrates a 4-channel 3.4 Gbps
TMDS equalizer and a 3:1 switch to select one of
the three HDMI ports. The high-speed data paths
and flow-through pinout minimize the internal
device jitter and simplify the board layout. The
equalizer overcomes the jitter effects from lossy
cables. The buffer/driver on the output can drive
the TMDS output signals over long distances.
Also, STDVE103A integrates the 50 W
termination resistor on all the input channels to
improve performance and reduce board space.
The device can be placed in a low-power mode by
disabling the output current drivers.
The differential signal from the HDMI/DVI ports
can be routed through the STDVE103A to
guarantee good signal quality at the HDMI
receiver.
Designed for very low skew, jitter and low I/O
capacitance, the switch preserves the signal
integrity to pass the stringent HDMI compliance
requirements.
Table 1. Device summary
Order code
Operating temperature
STDVE103A
-40°C to 85°C
Package
TQFP64
Packaging
Tape and reel
July 2008
Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/43
www.st.com
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STDVE103A pdf, 반도체, 판매, 대치품
List of tables
List of tables
STDVE103A
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Gain frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
SEL operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Bias parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Power supply characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
DC specifications for TMDS differential inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
DC specifications for TMDS differential ouputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
DC specifications for SEL (S1, S2) inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input termination resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
External reference resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
DDC I/O pins (switch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Status pins (HPD_SINK). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Status pins (HPD1, HPD2, HPD3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Input/output SDA, SCL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Clock and data rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Equalizer gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Differential output timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Skew times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Turn-on and turn-off times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
DDC I/O pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Status pins (HPD_SINK, HPD1, HPD2, HPD3, S1, S2) . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Jitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
I2C repeater . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
ESD performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
TQFP64 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
4/43

4페이지










STDVE103A 전자부품, 판매, 대치품
STDVE103A
2 Block diagram
Figure 1. STDVE103A block diagram
Block diagram
HDMI input
port A
HDMI input
port B
HDMI input
port C
DDC port A
DDC port B
DDC port C
S1,S2
HPD port A
HPD port B
HPD port C
3:1
HDMI
input
select
switch
Input stage
Equalizer
Output
driver/
transmitter
2
2
DDC
switch
2
I2C
repeater
2
HPD
analog
switch
HDMI output
port Y
DDC
port Y
HPD
port Y
Figure 2. Equalizer functional diagram (one signal pair)
Data+
50 Ω
termination
Data- selectable
S1, S2
Switch
(3:1)
Equalizer
CS00061A
Data+
Data-
S1,S2
REXT
Current
control
AM00716V1
7/43

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관련 데이터시트

부품번호상세설명 및 기능제조사
STDVE103A

Adaptive 3.4 Gbps 3:1 TMDS/HDMI signal equalizer

STMicroelectronics
STMicroelectronics

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