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STDVE001A PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 STDVE001A
기능 Adaptive single 3.4 Gbps TMDS/HDMI signal equalizer
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STDVE001A 데이터시트, 핀배열, 회로
STDVE001A
Adaptive single 3.4 Gbps TMDS/HDMI signal equalizer
Preliminary Data
Features
Compatible with the high-definition multimedia
interface (HDMI) v1.3 digital interface
Conforms to the transition minimized
differential signaling (TMDS) voltage standard
on input and output channels
340 MHz maximum clock speed operation
supports all video formats with deep color at
maximum refresh rates
3.4 Gbps data rate per channel
Fully automatic adaptive equalizer for cables
lengths up to 25 m
Single supply VCC: 3.135 to 3.465 V
ESD: ±8 KV contact for all I/Os
Integrated open-drain I2C buffer for display
data channel (DDC)
5.3 V tolerant DDC and HPD I/Os
Lock-up free operation of I2C bus
0 to 400 kHz clock frequency for I2C bus
Low capacitance of all the channels
Equalizer regenerates the incoming attenu-
ated TMDS signal
Buffer drives the TMDS outputs over long PCB
track lengths
Low output skew and jitter
Tight input thresholds reduce bit error rates
On-chip selectable 50 Ω input termination
Low ground bounce
Data and control inputs provide undershoot
clamp diode
Evaluation kit is available
Table 1. Device summary
Order code
Operating temperature
STDVE001ABTR
STDVE001AQTR
-40°C to 85°C
-40°C to 85°C
TQFP48
QFN48
Description
The STDVE001A integrates a 4-channel 3.4 Gbps
TMDS equalizer. High-speed data paths and flow-
through pinout minimize the internal device jitter
and simplify the board layout.
The equalizer overcomes the intersymbol
interference (ISI) jitter effects from lossy cables.
The buffer/driver on the output can drive the
TMDS output signals over long distances. In
addition to this, STDVE001A integrates the 50 Ω
termination resistor on all the input channels to
improve performance and reduce board space.
The device can be placed in a low-power mode by
disabling the output current drivers. The
STDVE001A is ideal for advanced TV and STB
applications supporting HDMI/DVI standard. The
differential signal from the HDMI/DVI ports can be
routed through the STDVE001A to guarantee
good signal quality at the HDMI receiver.
Designed for very low skew, jitter and low I/O
capacitance, the switch preserves the signal
integrity to pass the stringent HDMI compliance
requirements.
Package
TQFP48
QFN48
Packaging
Tape and reel
Tape and reel
July 2008
Rev 2
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
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STDVE001A pdf, 반도체, 판매, 대치품
List of figures
List of figures
STDVE001A
Figure 1.
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Figure 25.
STDVE001A block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Equalizer functional diagram (one signal pair) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
DDC I2C bus repeater . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
STDVE001A in a digital TV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin configuration (TQFP48 package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin configuration (QFN48 package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
STDVE001A gain vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Test circuit for electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
TMDS output driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Test circuit for HDMI receiver and driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Test circuit for turn off and turn off times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Test circuit for short circuit output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Propagation delays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Turn-on and turn-off times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
TSK(O) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
TSK(P) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
TSK(D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
AC waveform 1 (I2C lines) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Test circuit for AC measurements (I2C lines) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
I2C bus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Typical application of I2C bus system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
TQFP48 (7 x 7 mm) package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
TQFP48 (7 x 7 mm) footprint recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
TQFP48 (7 x 7 mm) tape and reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
QFN48 (7 x 7 mm) package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
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STDVE001A 전자부품, 판매, 대치품
STDVE001A
1.1 Application diagrams
Figure 4. STDVE001A in a digital TV
Block diagram
$6$ 2
34"
460#"BOARD
"ACKPANEL
($-)?"
($-)?#
 PORT($-)RECEIVER
34$6%!
($-)?!
&RONTPANELOFAHIGH END46
'AME
CONSOLE
!-6
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부품번호상세설명 및 기능제조사
STDVE001A

Adaptive single 3.4 Gbps TMDS/HDMI signal equalizer

STMicroelectronics
STMicroelectronics

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