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PDF AA150XW01 Data sheet ( Hoja de datos )
| Número de pieza | AA150XW01 | |
| Descripción | XGA Display Module | |
| Fabricantes | Mitsubishi | |
| Logotipo |  |
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TENTATIVE
All information in this technical data sheet is tentative
and subject to change without notice.
Preliminary
15.0” XGA
TECHNICAL SPECIFICATION
AA150XW01
MITSUBISHI ELECTRIC Corp.
Date: Jun.20,’14
MITSUBISHI Confidential
(1/26)
AA150XW01_02_00
1 page  
3. ABSOLUTE MAXIMUM RATINGS
ITEM
SYMBOL
MIN.
MAX.
UNIT
Power Supply Voltage for LCD
VCC
0.3
4.0
V
Logic Input Voltage
VI 0.3 VCC+0.3 V
Backlight Power Supply Input Voltage
VL 0.3 14.0 V
Backlight ON-OFF
BLEN
0.3
14.0
V
Light Dimming Control (PWM) Input Voltage V PDIM
0.3
14.0
V
Operation Temperature (Panel)
Note 1,2)
Top(Panel)
30
80 °C
Operation Temperature (Ambient) Note 2)
Top(Ambient)
30
80 °C
Storage Temperature
Note 2) Tstg 30 80 °C
[Note]
1) Measured at the center of active area and at the center of panel back surface
2) Top,Tstg 40C : 90%RH max. without condensation
Top,Tstg > 40C : Absolute humidity shall be less than the value of 90%RH at 40C without
condensation.
4. ELECTRICAL CHARACTERISTICS
(1)TFT-LCD
ITEM
SYMBOL MIN.
Power Supply Voltages for LCD
VCC
3.0
Power Supply Currents for LCD
ICC
--
Permissive Input Ripple Voltage VRP
--
Logic Input Voltage
High
Low
VIH 0.8VCC
VIL 0
*1) Power and signals sequence:
0.1ms t1 10ms
0 < t2 50 ms
0 < t3 50 ms
200 ms t4
200 ms t5
0 t6
LCD Power Supply
0.9VCC
Logic Signal
0.1VCC
VCC
data
TYP.
3.3
(550)
--
--
--
Ambient temperature: Ta = 25°C
MAX. UNIT Remarks
3.6 V
*1)
(1100) mA
*2)
100 mVp-p VCC = +3.3V
VCC
V MODE, SC
0.2VCC V
MODE, SC
0.9VCC
0.1VCC 0.1VCC
t1 t2
t3 t4
Backlight Power Supply
t5 t6
data: RGB DATA, DCLK, DENA, MODE, SC
MITSUBISHI Confidential
(5/26)
AA150XW01_02_00
5 Page 
6. INTERFACE TIMING
LVDS transmitter input signal
(1) Timing Specifications
ITEM
SYMBOL MIN.
TYP.
MAX.
UNIT
Frequency
DCLK Period
Active Time
Horizontal Blanking Time
Frequency
DENA
Period
Active Time
Blanking Time
Vertical
Frequency
Period
fCLK
tCLK
tHA
tHB
fH
tH
tVA
tVB
fV
tV
50
12.5
1024
20
42.4
16.6
768
3
50
13.3
65
15.4
1024
320
48.4
20.7
768
38
60
16.7
80
20
1024
--
60
23.6
768
--
75
20.0
MHz
ns
tCLK
tCLK
kHz
s
tH
tH
Hz
ms
[Note]
1) DENA (Data Enable) should always be positive polarity as shown in the timing specification.
2) DCLK should appear during all invalid period.
3) LVDS timing follows the timing specifications of LVDS receiver IC: THC63LVDF84B(Thine).
4) In case of blanking time fluctuation, please satisfy following condition.
tVBn > tVBn-1 3(tH)
MITSUBISHI Confidential
(11/26)
AA150XW01_02_00
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet AA150XW01.PDF ] | |
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