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부품번호 SIS892ADN 기능
기능 N-Channel 100-V (D-S) MOSFET
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SIS892ADN 데이터시트, 핀배열, 회로
N-Channel 100 V (D-S) MOSFET
SiS892ADN
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
100
RDS(on) () (Max.)
0.033 at VGS = 10 V
0.036 at VGS = 7.5 V
0.047 at VGS = 4.5 V
ID (A)f
28
26.8
23.5
Qg (Typ.)
6.1 nC
FEATURES
• TrenchFET® Power MOSFET
• 100 % Rg and UIS Tested
• Capable of Operating with 5 V Gate Drive
• Material categorization: For definitions of
compliance please see www.vishay.com/doc?99912
PowerPAK® 1212-8
3.30 mm
S
1S
3.30 mm
2
S
3G
4
D
8D
7
D
6
D
5
Bottom View
Ordering Information:
SiS892ADN-T1-GE3 (Lead (Pb)-free and Halogen-free)
APPLICATIONS
• Telecom Bricks
• Primary side switch
• Synchronous Rectification
• Industrial
D
G
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TC = 25 °C
Continuous Drain Current (TJ = 150 °C)
TC = 70 °C
TA = 25 °C
ID
Pulsed Drain Current (t = 300 µs)
TA = 70 °C
IDM
Continuous Source-Drain Diode Current
TC = 25 °C
TA = 25 °C
IS
Single Pulse Avalanche Current
Single Pulse Avalanche Energy
L = 0.1 mH
IAS
EAS
TC = 25 °C
Maximum Power Dissipation
TC = 70 °C
TA = 25 °C
PD
TA = 70 °C
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)c, d
TJ, Tstg
Limit
100
± 20
28
22.3
7.4a, b
6.0a, b
40
30g
3.1a, b
10
5
52
33
3.7a, b
2.4a, b
- 55 to 150
260
Unit
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
Maximum Junction-to-Ambienta, e
Maximum Junction-to-Case (Drain)
t 10 s
Steady State
RthJA
RthJC
28
2.0
34
°C/W
2.4
Notes:
a. Surface mounted on 1" x 1" FR4 board.
b. t = 10 s.
c. See solder profile (www.vishay.com/doc?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and
is not required to ensure adequate bottom side solder interconnection.
d. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
e. Maximum under steady state conditions is 81 °C/W.
f. Based on TC = 25 °C.
g. Package limited.
Document Number: 62716
For technical questions, contact: [email protected]
www.vishay.com
S12-1259-Rev. A, 21-May-12
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000




SIS892ADN pdf, 반도체, 판매, 대치품
SiS892ADN
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100 0.20
10
TJ = 150 °C
1
TJ = 25 °C
0.16
0.12
ID = 10 A
0.1
0.01
0.001
0.0
0.2 0.4 0.6 0.8 1.0
VSD - Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
1.2
0.4
0.2
0
- 0.2
- 0.4
- 0.6
ID = 5 mA
ID = 250 μA
- 0.8
- 50 - 25
0 25 50 75 100 125 150
TJ - Temperature (°C)
Threshold Voltage
100
IDM Limited
0.08
0.04
TJ = 25 °C
TJ = 125 °C
0.00
0
2468
VGS - Gate-to-Source Voltage (V)
10
On-Resistance vs. Gate-to-Source Voltage
100
80
60
40
20
0
0.001
0.01 0.1
Time (s)
1
10
Single Pulse Power, Junction-to-Ambient
10
ID Limited
100 μs
1 Limited by RDS(on)*
1 ms
10 ms
100 ms
0.1
1s
TA = 25 °C
Single Pulse
BVDSS Limited
0.01
0.01 0.1 1 10
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
10 s
DC
100
Safe Operating Area, Junction-to-Ambient
www.vishay.com
For technical questions, contact: [email protected]
Document Number: 62716
4 S12-1259-Rev. A, 21-May-12
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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SIS892ADN 전자부품, 판매, 대치품
www.vishay.com
Package Information
Vishay Siliconix
PowerPAK® 1212, (Single/Dual)
W
18
45
Z
2
H E2 K L
E4
1
2
3
4
L1
θθ
A1
2
E1
E
Notes:
1. Inch will govern
2 Dimensions exclusive of mold gate burrs
3. Dimensions exclusive of mold flash and cutting burrs
Detail Z
DIM.
MIN.
A 0.79
A1 0
b 0.23
c 0.13
D 3.00
D1 2.95
D2 1.98
D4
E 3.00
E1 2.95
E2 1.47
E3 1.75
E4
e
K
K1
H 0.15
L 0.15
L1 0.051
θ
W 0.15
M
ECN: C15-0077-Rev. K, 26-Jan-15
DWG: 5882
MILLIMETERS
0.31 TYP.
0.535 TYP.
0.65 BSC
0.61
0.35
0.125 TYP.
MAX.
1.12
0.05
0.41
0.33
3.61
3.21
2.70
3.61
3.21
2.21
1.98
0.51
0.56
0.204
12°
0.36
E3
Backside View of Single Pad
H
H
E2 K
E4
D1
L
1
2
3
D2
4
E3
Backside View of Dual Pad
MIN.
0.031
0
0.009
0.005
0.118
0.116
0.078
0.118
0.116
0.058
0.069
0.006
0.006
0.002
0.006
INCHES
0.012 TYP.
0.021 TYP.
0.026 BSC
0.024
0.014
0.005 TYP.
MAX.
0.044
0.002
0.016
0.013
0.142
0.126
0.106
0.142
0.126
0.087
0.078
0.020
0.022
0.008
12°
0.014
Revison: 26-Jan-15
1 Document Number: 71656
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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SIS892ADN

N-Channel 100-V (D-S) MOSFET

Vishay
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