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SIR864DP PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 SIR864DP
기능 N-Channel 30V (D-S) MOSFET
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SIR864DP 데이터시트, 핀배열, 회로
New Product
N-Channel 30 V (D-S) MOSFET
SiR864DP
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
30
RDS(on) ()
0.0036 at VGS = 10 V
0.0045 at VGS = 4.5 V
PowerPAK SO-8
ID (A)a
40g
40g
Qg (Typ.)
20 nC
FEATURES
Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET® Power MOSFET
• 100 % Rg Tested
• 100 % UIS Tested
• Compliant to RoHS Directive 2002/95/EC
6.15 mm
S
1S
5.15 mm
2
S
3G
4
D
8D
7
D
6
D
5
Bottom View
Ordering Information: SiR864DP-T1-GE3 (Lead (Pb)-free and Halogen-free)
APPLICATIONS
• Synchronous Buck Converter
- Low Side Switch: Low Ring Voltage
• Notebook PC
• Graphic Cards
• Server
G
D
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (TJ = 150 °C)
Pulsed Drain Current (300 µs)
Continuous Source-Drain Diode Current
Single Pulse Avalanche Current
Single Pulse Avalanche Energy
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
TC = 25 °C
TA = 25 °C
L =0.1 mH
VDS
VGS
ID
IDM
IS
IAS
EAS
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)d, e
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
PD
TJ, Tstg
Limit
30
± 20
40g
40g
28b, c
22.5b, c
70
40g
4.5b, c
30
45
54
34.7
5.0b, c
3.2b, c
- 55 to 150
260
Unit
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
Maximum Junction-to-Ambientb, f
Maximum Junction-to-Case (Drain)
t 10 s
Steady State
RthJA
RthJC
20
1.8
25
°C/W
2.3
Notes:
a. Based on TC = 25 °C.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See solder profile (www.vishay.com/ppg?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection.
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under steady state conditions is 65 °C/W.
g. Package limited.
Document Number: 66820
S10-2007-Rev. A, 06-Sep-10
www.vishay.com
1




SIR864DP pdf, 반도체, 판매, 대치품
New Product
SiR864DP
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100 0.015
10
TJ = 150 °C
1
0.1
TJ = 25 °C
0.012
0.009
0.006
ID = 15 A
TJ = 125 °C
0.01
0.001
0.0
0.2 0.4 0.6 0.8 1.0 1.2
VSD - Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
0.5
0.003
TJ = 25 °C
0
0 1 2 3 4 5 6 7 8 9 10
VGS - Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
250
0.2 200
- 0.1
- 0.4
- 0.7
ID = 5 mA
ID = 250 μA
150
100
50
- 1.0
- 50 - 25
0 25 50 75 100 125 150
TJ - Temperature (°C)
Threshold Voltage
0
0.001
0.01
0.1
1
10
Time (s)
Single Pulse Power, Junction-to-Ambient
100
Limited by RDS(on)*
10
1 ms
10 ms
1 100 ms
0.1
TA = 25 °C
Single Pulse
BVDSS Limited
1s
10 s
DC
0.01
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
www.vishay.com
4
Document Number: 66820
S10-2007-Rev. A, 06-Sep-10

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SIR864DP 전자부품, 판매, 대치품
www.vishay.com
Package Information
Vishay Siliconix
PowerPAK® SO-8, (Single/Dual)
W
1
2
3
4
θ
2
E1
E
L1
θ
Z
A1
Detail Z
Notes
1. Inch will govern.
2 Dimensions exclusive of mold gate burrs.
3. Dimensions exclusive of mold flash and cutting burrs.
MILLIMETERS
DIM.
MIN.
NOM.
MAX.
A 0.97 1.04 1.12
A1 - 0.05
b 0.33 0.41 0.51
c 0.23 0.28 0.33
D 5.05 5.15 5.26
D1 4.80 4.90 5.00
D2 3.56 3.76 3.91
D3 1.32 1.50 1.68
D4 0.57 typ.
D5 3.98 typ.
E 6.05 6.15 6.25
E1 5.79 5.89 5.99
E2 (for AL product)
E2 (for other product)
E3
E4 (for AL product)
E4 (for other product)
e
K (for AL product)
3.30
3.48
3.68
3.48
3.66
3.78
0.58 typ.
0.75 typ.
1.27 BSC
1.45 typ.
3.66
3.84
3.91
K (for other product)
K1
H
L
L1
W
0.56
0.51
0.51
0.06
0.15
1.27 typ.
-
0.61
0.61
0.13
-
0.25
-
0.71
0.71
0.20
12°
0.36
M
ECN: C13-0702-Rev. K, 20-May-13
DWG: 5881
0.125 typ.
Revison: 20-May-13
1
H
E2
L
K
E4
1
2
D
3
4
E3
Backside View of Single Pad
H
E2
K
E4
L
1
D1
2
3
D2
4
E3
Backside View of Dual Pad
MIN.
0.038
0
0.013
0.009
0.199
0.189
0.140
0.052
0.238
0.228
0.130
0.137
0.145
0.022
0.020
0.020
0.002
0.006
INCHES
NOM.
0.041
-
0.016
0.011
0.203
0.193
0.148
0.059
0.0225 typ.
0.157 typ.
0.242
0.232
0.137
0.144
0.149
0.023 typ.
0.030 typ.
0.050 BSC
0.057 typ.
0.050 typ.
-
0.024
0.024
0.005
-
0.010
0.005 typ.
MAX.
0.044
0.002
0.020
0.013
0.207
0.197
0.154
0.066
0.246
0.236
0.144
0.151
0.154
-
0.028
0.028
0.008
12°
0.014
Document Number: 71655
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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SIR864DP

N-Channel 30V (D-S) MOSFET

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