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SIRA10DP PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 SIRA10DP
기능 N-Channel 30V (D-S) MOSFET
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SIRA10DP 데이터시트, 핀배열, 회로
www.vishay.com
SiRA10DP
Vishay Siliconix
N-Channel 30 V (D-S) MOSFET
PRODUCT SUMMARY
VDS (V)
30
RDS(on) () (MAX.)
0.0037 at VGS = 10 V
0.0050 at VGS = 4.5 V
ID (A) a, g
60 g
60 g
Qg (TYP.)
15.4 nC
PowerPAK® SO-8 Single
D
D8
D7
D6
5
6.15 mm
1
Top View
5.15 mm
1
2S
3S
4S
G
Bottom View
Ordering Information:
SiRA10DP-T1-GE3 (Lead (Pb)-free and Halogen-free)
FEATURES
• TrenchFET® Gen IV power MOSFET
• 100 % Rg and UIS tested
• Material categorization:
For definitions of compliance please see
www.vishay.com/doc?99912
APPLICATIONS
• High power density DC/DC
• Synchronous rectification
• VRMs and embedded DC/DC
G
D
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (TJ = 150 °C)
Pulsed Drain Current (t = 100 μs)
Continuous Source-Drain Diode Current
Single Pulse Avalanche Current
Single Pulse Avalanche Energy
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature) d, e
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
TC = 25 °C
TA = 25 °C
L = 0.1 mH
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
VDS
VGS
ID
IDM
IS
IAS
EAS
PD
TJ, Tstg
LIMIT
30
+20, -16
60 g
60 g
25 b, c
23 b, c
140
34 g
4.2 b, c
20
20
40
26
5 b, c
3.2 b, c
-55 to 150
260
UNIT
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYPICAL
MAXIMUM
UNIT
Maximum Junction-to-Ambient b, f
Maximum Junction-to-Case (Drain)
t 10 s
Steady State
RthJA
RthJC
21
2.5
25
°C/W
3.1
Notes
a. Based on TC = 25 °C.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See solder profile (www.vishay.com/doc?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection.
e. Rework conditions: Manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under steady state conditions is 70 °C/W.
g. Package limited.
S14-0158-Rev. B, 03-Feb-14
1
Document Number: 63820
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000




SIRA10DP pdf, 반도체, 판매, 대치품
www.vishay.com
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100 0.010
TJ = 150 °C
10
0.008
0.006
0.004
1 TJ = 25 °C
0.002
SiRA10DP
Vishay Siliconix
ID = 10 A
TJ = 125 °C
TJ = 25 °C
0.1
0.0
0.2 0.4 0.6 0.8 1.0
VSD - Source-to-Drain Voltage (V)
1.2
Source-Drain Diode Forward Voltage
0.000
0
2468
VGS - Gate-to-Source Voltage (V)
10
On-Resistance vs. Gate-to-Source Voltage
2.1 100
1.9
1.7
1.5
ID = 250 μA
1.3
1.1
80
60
40
20
0.9
- 50 - 25
0 25 50 75 100 125 150
TJ - Temperature (°C)
Threshold Voltage
0
0.001 0.01
0.1 1 10
Time (s)
100 1000
Single Pulse Power, Junction-to-Ambient
1000
Limited by RDS(on)*
100
100 μs
10
1 ms
1
0.1 TA = 25 °C
BVDSS Limited
10 ms
100 ms
1s
10 s
DC
0.01
0.01
0.1 1 10 100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area
S14-0158-Rev. B, 03-Feb-14
4
Document Number: 63820
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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SIRA10DP 전자부품, 판매, 대치품
www.vishay.com
Package Information
Vishay Siliconix
PowerPAK® SO-8, (Single/Dual)
W
1
2
3
4
θ
2
E1
E
L1
θ
Z
A1
Detail Z
Notes
1. Inch will govern.
2 Dimensions exclusive of mold gate burrs.
3. Dimensions exclusive of mold flash and cutting burrs.
MILLIMETERS
DIM.
MIN.
NOM.
MAX.
A 0.97 1.04 1.12
A1 - 0.05
b 0.33 0.41 0.51
c 0.23 0.28 0.33
D 5.05 5.15 5.26
D1 4.80 4.90 5.00
D2 3.56 3.76 3.91
D3 1.32 1.50 1.68
D4 0.57 typ.
D5 3.98 typ.
E 6.05 6.15 6.25
E1 5.79 5.89 5.99
E2 (for AL product)
E2 (for other product)
E3
E4 (for AL product)
E4 (for other product)
e
K (for AL product)
3.30
3.48
3.68
3.48
3.66
3.78
0.58 typ.
0.75 typ.
1.27 BSC
1.45 typ.
3.66
3.84
3.91
K (for other product)
K1
H
L
L1
W
0.56
0.51
0.51
0.06
0.15
1.27 typ.
-
0.61
0.61
0.13
-
0.25
-
0.71
0.71
0.20
12°
0.36
M
ECN: C13-0702-Rev. K, 20-May-13
DWG: 5881
0.125 typ.
Revison: 20-May-13
1
H
E2
L
K
E4
1
2
D
3
4
E3
Backside View of Single Pad
H
E2
K
E4
L
1
D1
2
3
D2
4
E3
Backside View of Dual Pad
MIN.
0.038
0
0.013
0.009
0.199
0.189
0.140
0.052
0.238
0.228
0.130
0.137
0.145
0.022
0.020
0.020
0.002
0.006
INCHES
NOM.
0.041
-
0.016
0.011
0.203
0.193
0.148
0.059
0.0225 typ.
0.157 typ.
0.242
0.232
0.137
0.144
0.149
0.023 typ.
0.030 typ.
0.050 BSC
0.057 typ.
0.050 typ.
-
0.024
0.024
0.005
-
0.010
0.005 typ.
MAX.
0.044
0.002
0.020
0.013
0.207
0.197
0.154
0.066
0.246
0.236
0.144
0.151
0.154
-
0.028
0.028
0.008
12°
0.014
Document Number: 71655
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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SIRA10DP

N-Channel 30V (D-S) MOSFET

Vishay
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