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SIS472ADN PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 SIS472ADN
기능 N-Channel 30V (D-S) MOSFET
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SIS472ADN 데이터시트, 핀배열, 회로
N-Channel 30 V (D-S) MOSFET
SiS472ADN
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
30
RDS(on) () Max.
0.0085 at VGS = 10 V
0.0105 at VGS = 4.5 V
ID (A)a, g
24
24
Qg (Typ.)
12.8 nC
PowerPAK® 1212-8
FEATURES
• TrenchFET® Power MOSFET
• Optimized for High-Side Synchronous
Rectifier Operation
• 100 % Rg and UIS Tested
Material categorization:
For definitions of compliance please see
www.vishay.com/doc?99912
3.30 mm
S
1S
3.30 mm
2
S
3G
4
D
8D
7
D
6
D
5
Bottom View
Ordering Information: SiS472ADN-T1-GE3 (Lead (Pb)-free and Halogen-free)
APPLICATIONS
Notebook CPU Core
- High-Side Switch
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (TJ = 150 °C)
Pulsed Drain Current (t = 300 µs)
Continuous Source-Drain Diode Current
Single Pulse Avalanche Current
Avalanche Energy
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)d, e
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
TC = 25 °C
TA = 25 °C
L = 0.1 mH
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
VDS
VGS
ID
IDM
IS
IAS
EAS
PD
TJ, Tstg
Limit
30
± 20
24g
24g
15b, c
12b, c
60
24g
3.2b, c
10
5
28
18
3.5b, c
2.2b, c
- 55 to 150
260
D
G
S
N-Channel MOSFET
Unit
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
Maximum Junction-to-Ambientb, f
Maximum Junction-to-Case (Drain)
t 10 s
Steady State
RthJA
RthJC
29
3.6
36
°C/W
4.5
Notes:
a. Base on TC = 25 °C.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See solder profile (www.vishay.com/doc?73257). The PowerPAK® 1212 is a leadless package. The end of the lead terminal is exposed copper
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection.
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under steady state conditions is 81 °C/W.
g. Package limited.
Document Number: 62629
For technical questions, contact: pmostechsupport@vishay.com
www.vishay.com
S12-1623-Rev. A, 09-Jul-12
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000




SIS472ADN pdf, 반도체, 판매, 대치품
SiS472ADN
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100 0.040
10
0.032
ID = 10 A
1
TJ = 150 °C
0.1
TJ = 25 °C
0.01
0.001
0.0
0.3 0.6 0.9 1.2
VSD - Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
1.5
0.5
0.024
0.016
TJ = 125 °C
0.008
TJ = 25 °C
0.000
0 2 4 6 8 10
VGS - Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
120
0.2 96
- 0.1
- 0.4
- 0.7
ID = 5 mA
ID = 250 μA
72
48
24
- 1.0
- 50 - 25
0 25 50 75 100 125 150
TJ - Temperature (°C)
Threshold Voltage
0
0.001
0.01 0.1
Time (s)
1
10
Single Pulse Power, Junction-to-Ambient
100
IDM Limited
10 ID Limited
1 Limited by RDS(on)*
100 μs
1 ms
10 ms
100 ms
1s
0.1 10 s
DC
TA = 25 °C
Single Pulse
BVDSS Limited
0.01
0.01 0.1 1 10 100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
www.vishay.com
For technical questions, contact: pmostechsupport@vishay.com
Document Number: 62629
4 S12-1623-Rev. A, 09-Jul-12
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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SIS472ADN 전자부품, 판매, 대치품
www.vishay.com
Package Information
Vishay Siliconix
PowerPAK® 1212, (Single/Dual)
W
18
45
Z
2
H E2 K L
E4
1
2
3
4
L1
θθ
A1
2
E1
E
Notes:
1. Inch will govern
2 Dimensions exclusive of mold gate burrs
3. Dimensions exclusive of mold flash and cutting burrs
Detail Z
DIM.
MIN.
A 0.79
A1 0
b 0.23
c 0.13
D 3.00
D1 2.95
D2 1.98
D4
E 3.00
E1 2.95
E2 1.47
E3 1.75
E4
e
K
K1
H 0.15
L 0.15
L1 0.051
θ
W 0.15
M
ECN: C15-0077-Rev. K, 26-Jan-15
DWG: 5882
MILLIMETERS
0.31 TYP.
0.535 TYP.
0.65 BSC
0.61
0.35
0.125 TYP.
MAX.
1.12
0.05
0.41
0.33
3.61
3.21
2.70
3.61
3.21
2.21
1.98
0.51
0.56
0.204
12°
0.36
E3
Backside View of Single Pad
H
H
E2 K
E4
D1
L
1
2
3
D2
4
E3
Backside View of Dual Pad
MIN.
0.031
0
0.009
0.005
0.118
0.116
0.078
0.118
0.116
0.058
0.069
0.006
0.006
0.002
0.006
INCHES
0.012 TYP.
0.021 TYP.
0.026 BSC
0.024
0.014
0.005 TYP.
MAX.
0.044
0.002
0.016
0.013
0.142
0.126
0.106
0.142
0.126
0.087
0.078
0.020
0.022
0.008
12°
0.014
Revison: 26-Jan-15
1 Document Number: 71656
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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SIS472ADN

N-Channel 30V (D-S) MOSFET

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