|
|
|
부품번호 | 74AUP1T97 기능 |
|
|
기능 | Low Power Configurable Gate | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 11 페이지수
October 2010
74AUP1T97
TinyLogic® Low Power Configurable Gate with
Voltage-Level Translator
Features
Single Supply Voltage Translator
- 1.8V to 3.3V Input at VCC=3.3V
- 1.8V to 2.5V Input at VCC=2.5V
2.3V to 3.6V VCC Supply Voltage Operation
3.6V Over-Voltage Tolerant I/O’s at VCC from
2.3V to 3.6V
Power-Off High-Impedance Inputs and Outputs
Low Static Power Consumption
- ICC=0.9µA Maximum
Low Dynamic Power Consumption
- CPD=2.7pF Typical at 3.3V
Ultra-Small MicroPak™ Packages
Description
The 74AUP1T97 is a universal configurable 2-input
logic gate that provides single supply voltage level
translation. This device is designed for applications with
inputs switching levels that accept 1.8V low voltage
CMOS signals while operating from either a single 2.5V
or 3.3V supply voltage. The 74AUP1T97 is an ideal low
power solution for mixed voltage signal applications
especially for battery-powered portable applications.
This product guarantees very low static and dynamic
power consumption across entire voltage range. All
inputs are implemented with hysteresis to allow for
slower transition input signals and better switching
noise immunity.
The 74AUP1T97 provides for multiple functions as
determined by various configurations of the three
inputs. The potential logic functions provided are MUX,
AND, NAND, OR, and NOR, inverter and buffer. Refer
to Figures 3 to 9.
Ordering Information
Part Number Top Mark
Package
74AUP1T97L6X
AH 6-Lead MicroPak™, 1.0mm Wide
74AUP1T97FHX
AH 6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch
Packing Method
5000 Units on
Tape & Reel
5000 Units on
Tape & Reel
© 2008 Fairchild Semiconductor Corporation
74AUP1T97 • Rev. 1.0.3
www.fairchildsemi.com
74AUP1T97 Logic Configurations
Figure 3 through Figure 9 show the logical functions
that can be implemented using the 74AUP1T97. The
diagrams show the DeMorgan’s equivalent logic duals
for a given two-input function. The logical
implementation is next to the board-level physical
implementation of how the pins of the function should
be connected.
C
B1
6
BY
25
A
A3
4
GND
Note:
1. When C is L, Y=B.
2. When C is H, Y=A.
Figure 3. 2-to-1 MUX
VCC
C
Y
VCC
C 1 6C
Y
A
25
A3
4Y
GND
Figure 4. 2-Input AND Gate
VCC
VCC
C
C
Y
Y
B
A
B1
6C
1 6C
C
25
C 25
A
Y
A3
4Y
Y
B
3 4Y
GND
GND
Figure 5. Input OR Gate with One Inverted Input Figure 6. 2-Input AND Gate with One Inverted Input
2-Input NAND Gate with One Inverted Input
2-Input NOR Gate with One Inverted Input
VCC
C
YB
1 6C
B 25
3 4Y
GND
Figure 7. 2-Input OR Gate
C
VCC
1 6C
Y 25
3 4Y
GND
Figure 8. Inverter
VCC
B
© 2008 Fairchild Semiconductor Corporation
74AUP1T97 • 1.0.3
B1
6
Y 25
3 4Y
GND
Figure 9. Buffer
4
www.fairchildsemi.com
4페이지 AC Electrical Characteristics
Symbol Parameter
tPHL, tPLH
Propagation
Delay
CIN
COUT
CPD
Input
Capacitance
Output
Capacitance
Power
Dissipation
Capacitance
VCC Conditions
2.30V ≤ VCC ≤ 2.70V,
VIN=1.65V to 1.95V
2.30V ≤ VCC ≤ 2.70V,
VIN=2.30V to 2.70V
2.30V ≤ VCC ≤ 2.70V,
VIN=3.0V to 3.60V
3.00V ≤ VCC ≤ 3.60V,
VIN=1.65V to 1.95V
3.00V ≤ VCC ≤ 3.60V,
VIN=2.30V to 2.70V
3.00V ≤ VCC ≤ 3.60V,
VIN=3.00V to 3.60V
2.30V ≤ VCC ≤ 2.70V,
VIN=1.65V to 1.95V
2.30V ≤ VCC ≤ 2.70V,
VIN=2.30V to 2.70V
2.30V ≤ VCC ≤ 2.70V,
VIN=3.0V to 3.60V
3.00V ≤ VCC ≤ 3.60V,
VIN=1.65V to 1.95V
3.00V ≤ VCC ≤ 3.60V,
VIN=2.30V to 2.70V
3.00V ≤ VCC ≤ 3.60V,
VIN=3.00V to 3.60V
2.30V ≤ VCC ≤ 2.70V,
VIN=1.65V to 1.95V
2.30V ≤ VCC ≤ 2.70V,
VIN=2.30V to 2.70V
2.30V ≤ VCC ≤ 2.70V,
VIN=3.0V to 3.60V
3.00V ≤ VCC ≤ 3.60V,
VIN=1.65V to 1.95V
3.00V ≤ VCC ≤ 3.60V,
VIN=2.30V to 2.70V
3.00V ≤ VCC ≤ 3.60V,
VIN=3.00V to 3.60V
2.30V ≤ VCC ≤ 2.70V,
VIN=1.65V to 1.95V
2.30V ≤ VCC ≤ 2.70V,
VIN=2.30V to 2.70V
2.30V ≤ VCC ≤ 2.70V,
VIN=3.0V to 3.60V
3.00V ≤ VCC ≤ 3.60V,
VIN=1.65V to 1.95V
3.00V ≤ VCC ≤ 3.60V,
VIN=2.30V to 2.70V
3.00V ≤ VCC ≤ 3.60V,
VIN=3.00V to 3.60V
CL=5pF,
RL=1MΩ
CL=10pF,
RL=1MΩ
CL=15pF,
RL=1MΩ
CL=30pF,
RL=1MΩ
0
0
2.30V ≤ VCC ≤ 2.70V
3.00V ≤ VCC ≤ 3.60V
TA=+25°C
TA=-40 to +85°C
Units Figure
Min. Typ. Max. Typ. Max.
1.1 3.7 5.5
1.1
6.8
1.1 3.8 6.5
1.1
7.0
1.1 3.9 6.0
1.1
6.5
1.0 3.3 4.9
1.0
8.0
1.0 3.2 4.6
1.0
5.8
1.0 3.1 4.7
1.0
5.5
1.3 4.1 6.5
1.0
7.9
1.3 4.0 6.2
1.0
7.1
1.3 3.7 5.7
1.0
6.5
1.3 3.5 5.6
1.0
8.5
1.3 3.4 5.3
1.0
6.1
1.3 3.3 5.2
1.5 4.6 6.9
1.0
1.0
5.9
ns
Figure 10
Figure 11
8.7
1.5 4.4 6.8
1.0
7.9
1.5 4.2 6.3
1.0
7.4
1.3 3.9 6.2
1.0
9.1
1.3 3.8 5.6
1.0
6.8
1.3 3.8 5.6
1.0
6.2
1.3 4.2 7.9
1.3
8.5
1.3 3.9 7.9
1.3
8.5
1.0 3.7 7.3
1.0
8.9
1.3 3.5 6.1
1.3
7.9
1.1 3.0 5.9
1.1
6.8
1.0 2.7 5.7
1.0
6.5
2.1 pF
3.0 pF
2.0
pF
2.7
© 2008 Fairchild Semiconductor Corporation
74AUP1T97 • 1.0.3
7
www.fairchildsemi.com
7페이지 | |||
구 성 | 총 11 페이지수 | ||
다운로드 | [ 74AUP1T97.PDF 데이터시트 ] |
당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는 |
구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
74AUP1T97 | Low Power Configurable Gate | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |