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PDF FDD86113LZ Data sheet ( Hoja de datos )
| Número de pieza | FDD86113LZ | |
| Descripción | MOSFET ( Transistor ) | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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June 2013
FDD86113LZ
N-Channel Shielded Gate PowerTrench® MOSFET
100 V, 5.5 A, 104 mΩ
Features
General Description
Shielded Gate MOSFET Technology
Max rDS(on) = 104 mΩ at VGS = 10 V, ID = 4.2 A
Max rDS(on) = 156 mΩ at VGS = 4.5 V, ID = 3.4 A
HBM ESD protection level > 6 kV typical (Note 4)
This N-Channel logic Level MOSFETs are produced using
Fairchild Semiconductor‘s advanced PowerTrench® process
that incorporates Shielded Gate technology. This process has
been optimized for the on-state resistance and yet maintain
superior switching performance. G-S zener has been added to
enhance ESD voltage level.
High performance trench technology for extremely low rDS(on)
High power and current handling capability in a widely used
surface mount package
Application
DC-DC conversion
100% UIL Tested
RoHS Compliant
G
S
D
DT O-P-2A5K2
(T O -25 2)
D
G
S
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
TC = 25 °C
TA = 25 °C
-Pulsed
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 3)
(Note 1a)
Ratings
100
±20
5.5
4.2
15
12
29
3.1
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1)
(Note 1a)
4.3
96
°C/W
Device Marking
FDD86113LZ
Device
FDD86113LZ
Package
D-PAK(TO-252)
Reel Size
13 ’’
Tape Width
12 mm
Quantity
2500 units
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. C1
1
www.fairchildsemi.com
1 page  
Typical Characteristics TJ = 25 °C unless otherwise noted
2000
1000
100
SINGLE PULSE
RθJC = 4.3 oC/W
TC = 25 oC
10
10-5
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
Figure 13. Single Pulse Maximum Power Dissipation
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.1 0.02
0.01
SINGLE PULSE
RθJC = 4.3 oC/W
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
0.01
10-5
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Junction-to-Case Transient Thermal Response Curve
1
1
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. C1
5
www.fairchildsemi.com
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