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PDF MGA-52543 Data sheet ( Hoja de datos )

Número de pieza MGA-52543
Descripción Low Noise Amplifier
Fabricantes AVAGO 
Logotipo AVAGO Logotipo



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MGA-52543
Low Noise Amplifier
Data Sheet
Description
Avago Technologies’ MGA-52543 is an economical, easy-
to-use GaAs MMIC Low Noise Amplifier (LNA), which
is designed for use in LNA and driver stages. While a
capable RF/microwave amplifier for any low noise and
high linearity 0.4 to 6 GHz application, the LNA focus is
Cellular/PCS base stations.
To attain NF condition, some simple external matching is
min
required. The MGA-52543 features a calculated NF of 1.61
min
dB and 15 dB associated gain at 1.9 GHz from a cascode
stage, feedback FET amplifier. The input and output are
partially matched to be near 50 Ω.
For base station radio card unit LNA application where
better than 2:1 VSWR is required, a series inductor on the
input and another series inductor on the output can be
added externally. The resulting Noise Figure is typically
1.9 dB with 14 dB Gain at 1.9 GHz. With a single 5.0V
supply, the LNA typically draws 53 mA. This alignment
results in an Input Intercept Point of 17.5 dBm.
The MGA-52543 is a GaAs MMIC, fabricated using Avago
Technologies’ cost-effective, reliable PHEMT (Pseudomor-
phic High Electron Mobility Transistor) process. It is housed
in the SOT-343 (SC70 4-lead) package. This package offers
miniature size (1.2 mm by 2.0 mm), thermal dissipation,
and RF characteristics.
Surface Mount Package
SOT-343/4-lead SC70
Features
Lead-free Option Available
Operating frequency:
0.4 GHz ~ 6.0 GHz
Minimum noise figure: 1.61 dB at 1.9 GHz
Associated gain : 15 dB at 1.9 GHz
1.9 GHz performance tuned for VSWR < 2:1
Noise figure: 1.9 dB
Gain: 14 dB
P : +17.5 dBm
1dB
Input IP3: +17.5 dBm
Single supply 5.0 V operation
Applications
Cellular/PCS base station radio card LNA
High dynamic range amplifier for base stations, WLL,
WLAN, and other applications
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model (Class A)
ESD Human Body Model (Class 1A)
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
Simplified Schematic
Pin Connections and Package Marking
3
INPUT
1
GND
4
GND
2
OUTPUT
&Vd
Note:
Top View. Package marking provides orientation and identification.
“42” = Device Code
“x” = Data code character identifies month of manufacture
Input
3.3 nH
Gnd
360 pF
Vd 5V
22 nH
2.2 nH
Output
18 pF
MGA-52543

1 page




MGA-52543 pdf
MGA-52543 Typical Performance, continued
ICM Fixture
RF
Input
Vd
Bias
Tee
RF
Output
Figure 18. Test Circuit for Figures 19 through 24 (Input and Output presented to 50Ω).
3.0
2.6
2.2
1.8
1.4
1.0
012 3456 7
FREQUENCY (GHz)
Figure 19. Noise Figure vs. Frequency
20
17
14
11
8
5
012 3456 7
FREQUENCY (GHz)
Figure 20. Gain vs. Frequency.
-15
-19
-23
-27
-31
-35
012 3456 7
FREQUENCY (GHz)
Figure 22. Isolation vs. Frequency.
5
4
3
2
In
1 Out
012 3456 7
FREQUENCY (GHz)
Figure 23. Input and Output VSWR vs. Frequency.
32
28
24
OIP3
P1dB
IIP3
20
16
12
012 3456
FREQUENCY (GHz)
Figure 21. Input IP3, Output IP3 and P1dB vs.
Frequency.
7
70
60
50
40
30
20
10
0
012 345
Vs (V)
Figure 24. Current vs. Vd.
Id (-40 C)
Id (+25 C)
Id (+85 C)
678
5

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