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NX1A4WP 데이터시트 PDF




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부품번호 NX1A4WP 기능
기능 A4WP compliant high frequency wireless charging receiver front end
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NX1A4WP 데이터시트, 핀배열, 회로
NX1A4WP
A4WP compliant high frequency wireless charging receiver
front end
Rev. 2 — 4 August 2015
Product short data sheet
1. General description
The NX1A4WP is an A4WP (Alliance for Wireless Power) compliant wireless power
receiver front end. It contains a high-voltage, highly efficient rectifier, integrated LDOs, a
D2C-to-DC converter, a multi-channel 12-bit ADC, four GPIOs and a Fast-Mode I2C-bus
interface. The integrated rectifier supports voltages of up to 20 V and is protected by an
integrated automatic clamping function and an automatic over-power protection function.
The DC-to-DC regulator delivers a nominal voltage of 5 V. The host microcontroller
configures the on-chip controller for automatic interrupt-driven system control.
The controller reads the rectifier output voltage, current level information, junction
temperature and external temperature sensor information from the ADC. It controls the
DC-to-DC converter as well as the GPIOs.
2. Features and benefits
25 V tolerant antenna input pins
Automatic over-voltage protection of the antenna inputs
6.78 MHz compatible integrated rectifier
High efficiency with an active rectifier and a DC-to-DC converter
Integrated LDOs (1.8 V and 3.3 V up to 100 mA) with auto enable and discharge path
Integrated DC-to-DC buck regulator with 5 V, 1.2 A output
Multi-channel 12-bit ADC subsystem
Temperature sensor (NTC) analog interface
USB bus power supply detection
400 kHz I2C-bus slave interface
Software and power-on reset of the on-chip digital controller
Programmable rectifier modes: active, half-active and passive
2 digital General Purpose Input and Output ports (GPIOs) with open-drain outputs and
up to 60 V tolerance for control and communication applications
2 digital General Purpose Input and Output ports (GPIOs) with open-drain outputs and
25 V tolerance for control and communication applications
Protection circuitry
Automatic over-power protection
Automatic AC short to ground for OVP option
Automatic DC-to-DC over-voltage protection lock out option
Over-temperature protection
Over-voltage protection
Under-voltage protection




NX1A4WP pdf, 반도체, 판매, 대치품
NXP Semiconductors
6. Functional diagram
NX1A4WP
High frequency wireless charging receiver front end
8
1.8 V
1.8 V
POR swrst BOD
LDO
reset
RESET
SYSTEM CONTROL
STATUS FLAG REG
STATUS FLAG CLEAR REG
INTERRUPT CONTROL REG
SYSTEM CONTROL REG
I/O CONTROL REG
ADC CONTROL REG
ADC CHAN SEL REG
12-bit ADC
RECTIFIER VOLTAGE REG
RECTIFIER CURRENT REG
DC/DC OUTPUT VOLTAGE REG
DC/DC OUTPUT CURRENT REG
NTC TEMP SENSOR REG
OTP TEMP SENSOR 1 REG
OTP TEMP SENSOR 2 REG
RECT LOWER NIBBLE REG
DC/DC LOWER NIBBLES REG
NTC, TJ0 LOWER NIBBLES REG
TJ1 LOWER NIBBLE REG
INTERRUPT
INT
PORT
CONTROL
ADC
CONTROL
AND
CHANNEL
SCAN
GPIO[4:1]
6
VVRECT
COMPARATORS
IRECT
VDCOUT
IDCOUT
VNTC
VOTP1
VOTP2
voltage and current
sources
SDA
SCL
I2C INTERFACE
8
LDO AND DC/DC CONVERTER
DC/DC CONVERTER CONTROL REG
NTC TEMP SELECT
DEVICE ID
ADDRESS PTR
MTP MEMORY
Fig 2. Functional diagram of the digital controller
aaa-017119
NX1A4WP_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 August 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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NX1A4WP 전자부품, 판매, 대치품
NXP Semiconductors
NX1A4WP
High frequency wireless charging receiver front end
7.1.1 Automatic over-power protection (OVP)
The over-power function automatically enables when the rectifier output voltage (VO(rect))
exceeds 18 V. It turns on GPIO1 and GPIO2 in an effort to reduce energy transfer.
The OVD function is permanently enabled. A voltage comparator is used to detect when
VO(rect) rises above the upper voltage limit, Vovd(en). The rising edge of the comparator
output sets the OVD flag bit to logic 1. The OVD flag is a bit corresponding to the status
register STATU. The OVD flag records the occurrence of the event. The GPIO1 and
GPIO2 open-drain pins connect the CTUNE capacitors to ground as long as VRECT is above
Vovd(dis). Also, if the OVDIE bit is set to logic 1, the open-drain INT pin is set to logic 0. It
initiates an interrupt service request from the host microcontroller. To clear the interrupt
triggered condition, the VRECT voltage must drop below the over-voltage limit (Vovd(dis)).
The OVD flag bit is cleared by using the automatic clear of status bits (INTCL = logic 1 in
the SYSCONL register) and reading the STATU register. Alternatively, it can be cleared by
writing a logic 1 to the OVDC bit in the status flag clear register. Resetting the INT pin
back to logic 1 clears the interrupt request. Once the OVD flag is cleared, it is not set
again until the VO(rect) voltage crosses below Vovd(dis) and then exceeds Vovd(en) again.
See Figure 4 and Figure 5 for diagrams of interrupt request handling by the host
microcontroller and the NX1A4WP device.
NX1A4WP_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 August 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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NX1A4WP

A4WP compliant high frequency wireless charging receiver front end

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