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ML610Q360 데이터시트 PDF




LAPIS Semiconductor에서 제조한 전자 부품 ML610Q360은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 ML610Q360 자료 제공

부품번호 ML610Q360 기능
기능 8-bit Microcontroller
제조업체 LAPIS Semiconductor
로고 LAPIS Semiconductor 로고


ML610Q360 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.



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ML610Q360 데이터시트, 핀배열, 회로
ML610Q359/ML610Q360
8-bit Microcontroller with Voice Output Function
FEDL610Q359-01
Issue Date: Jul 31, 2015
GENERAL DESCRIPTION
Equipped with a 8-bit CPU nX-U8/100, the ML610Q359 is a high-performance 8-bit CMOS microcontroller that integrates a
wide variety of peripherals such as, 12-bit A/D converter, timer, synchronous serial port, UART, and voice output function.
The nX-U8/100 CPU is capable of executing instructions efficiently on a one-instruction-per-clock-pulse basis through parallel
processing by the 3-stage pipelined architecture.
In addition, it has an on-chip debugging function, which allows software debugging/rewriting with the LSI mounted on the
board.
FEATURES
CPU
8-bit RISC CPU (CPU name: nX-U8/100)
Instruction system: 16-bit instructions
Instruction set:Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations,
bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on
On-Chip debug function
Minimum instruction execution time
Approx 30.5 µs (at 32.768kHz system clock)
Approx 0.125 µs (at 8MHz system clock)DVDD = 2.2 to 3.6V
Approx 0.250 µs (at 4MHz system clock)DVDD = 2.0 to 3.6V
Internal memory
Has 160-Kbyte flash ROM(80K × 16-bit) built in. (544 byte of test domain that it cannot be used is included)
Has 3-Kbyte flash ROM built in. (area in which self rewriting is possible.512Byte×6)
Has 2-Kbyte RAM (2048 × 8 bits) built in.
Has 16-Mbit P2ROM built in. (only ML610Q360)
Interrupt controller
2 non-maskable interrupt sources (Internal source: 1, External source: 1)
25 maskable interrupt sources (Internal source: 19, External source: 6)
Time base counter
Low-speed time base counter × 1 channel
High-speed time base counter × 1 channel
Watchdog timer
Generates a non-maskable interrupt upon the first overflow and a system reset occurs upon the second
Free running
Overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s)
Timers
8 bits × 8ch (16-bit configuration available)
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ML610Q360 pdf, 반도체, 판매, 대치품
BLOCK DIAGRAM
Block Diagram of ML610Q359
EPSW13
PSW
Timing
Controller
On-Chip
ICE
CPU (nX-U8/100)
GREG
015
ELR13
LR
EA
ALU
SP
Instruction
Decoder
Instruction
Register
ECSR13
DSR/CSR
PC
BUS
Controller
Program
Memory
Flash
160Kbyte
DVDD
DVSS
RESET_N
TEST0
TEST1_N
XT0
XT1
LSCLK*
OUTCLK*
VDDL
VDDX
AVDD
AVSS
AIN0 to AIN2
AVDD
AVSS
VDDR
RESET &
TEST
OSC
POWER
12bit-ADC
INT
1
VDDR
Data-bus
RAM
2048byte
Interrupt
Controller
INT
4
TBC
INT
8 8bit Timer
×8
INT
WDT
Temperature
sensor
SVS
INT
2
SSIO
INT
3
UART
INT
7
GPIO
INT
1
VOICECNT
SPEAKER
AMP
FEDL610Q359-01
ML610Q359/ML610Q360
SCK0*
SIN0*1
SOUT0*
SCK1*
SIN1*
SOUT1*
RXD0*,
RXD1*
RXD2*
TXD0*
TXD1*
TXD2*
NMI
P00 to P05
P10
P20 to P22
P30 to P37
P40 to P47
P50 to P57 *1
P60 to P63
SG
AOUT
SPVDD
SPVSS
SG
SPIN
SPP
SPM
* : Secondary or tertiary or fourthly function
*1: It is the point with the difference in ML610Q359 and ML610Q360
Figure 1 Block Diagram of ML610Q359
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ML610Q360 전자부품, 판매, 대치품
ML610Q360 TQFP package product
P62
P63
NMI
P20
P21
P22
DVSS
P00
P01
P02
P03
SG
AOUT
SPIN
SPVDD
SPVSS
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
FEDL610Q359-01
ML610Q359/ML610Q360
32 AVSS
31 AVDD
30 AIN2
29 AIN1
28 AIN0
27
26
VDDR
P37
25 P36
24 P35
23 P34
22 P33
21 P32
20 P31
19 P30
18 P05
17 P04
*: It is the point with the difference in ML610Q359 and ML610Q360
Figure 4 Pin Configuration of ML610Q360 Package Product
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관련 데이터시트

부품번호상세설명 및 기능제조사
ML610Q360

8-bit Microcontroller

LAPIS Semiconductor
LAPIS Semiconductor

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