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PDF ML610Q794G Data sheet ( Hoja de datos )
| Número de pieza | ML610Q794G | |
| Descripción | Sensor Control Hub 8-bit Microcontroller | |
| Fabricantes | LAPIS Semiconductor | |
| Logotipo |  |
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ML610Q794G
Sensor Control Hub 8-bit Microcontroller
FEDL610Q794-02
Issue Date: Jan. 29, 2015
■ General Description
The ML610Q794G is a high-performance 8-bit low power microcontroller optimized for sensor hub applications that integrates
LAPIS Semiconductor’s original high-performance 8-bit CPU core, with a 16-bit multiplier/divider co-processor, 64 KByte
flash memory, 4 KByte RAM, multiple interfaces for various sensors and host interfaces with 8KByte logging RAM in 48pin
TQFP package. The ML610Q794G is an ideal sensor hub microcontroller for personal healthcare equipments, wearable devices,
and sensor nodes that all require power efficient control and data collection from multiple sensors.
■ Features
● CPU
—8-bit RISC CPU (CPU name: uX-U8/100)
—16-bit length instruction system
—Minimum instruction execution time
30.5 us (32.768 kHz system clock)
0.25 us (4.096 MHz system clock)
—Built-in co-processor for multiplication, division, and multiply-accumulate operations
Multiplication (Input: 16-bit x 16-bit, Output: 32-bit)
Division (Input: 32-bit/16-bit, Output: 32-bit)
Multiply-accumulate (Input: 16-bit x 16-bit + 32-bit, Output: 32-bit)
● Internal memory
—64KByte Flash ROM (32KWord x 16-bits)
—4KByte SRAM (4KWord x 8-bits)
● Interrupt controller
—Non-maskable interrupt: 1 source
—Maskable interrupt: 29 sources
Number of internal sources: 13 (Timer: 6, ADC: 1, HOST I/F: 1, Arithmetic unit: 1, UART: 1,
SPI: 1, SIO: 1, I2C: 1)
Number of external sources: 16
● Timer
—8-bit auto-reload timer x 6ch (These timers can be used as 16-bit auto-reload timer x 3ch)
—Watchdog timer (WDT) x 1ch
● Serial interface
—SPI interface with master function x 1ch
—I2C interface with master function x 1ch
—UART interface (two-wire, full duplex communication with 16-bit FIFO) x 1ch
—SIO interface (two-wire, half-duplex communication) x 1ch
● Host interface
—Serial interface with slave function (SPI or I2Cis selectable) x 1ch
—Outputs a host processor interrupt x 1ch (secondary function of general-purpose I/O port)
—8-KByte RAM for data logging data
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1 page  
■ List of Pins
PIN
No.
Symbol
38 AGND
39 AVDD
36 DGND
35 DVDD
34 VDDL
37 VDDX
48 I2C_SPISEL
3 SDO_SDA_S
17 SDI_SA1_S
5 SCS_SA0_S
4 SCLK_SCL_S
32 SDA_M
33 SCL_M
6 SDO_M
19 SDI_M
7 SCS_M
8 SCLK_M
40 ADC_IN1
41 ADC_IN0
10 PC0_INT_S
2 PC1
11 PC2_RXD0
12 PC3_TXD0
18 PC4
16 PA0_EXI00
31 PA1_EXI01
20 PA2_EXI02
30 PA3_EXI03
21 PA4_EXI04
29 PA5_EXI05
28 PA6_EXI06
27 PA7_EXI07
26 PB0_EXI08
25 PB1_EXI09
22 PB2_EXI10
23 PB3_EXI11
Input/output
—
—
—
—
—
—
I
IO
O
I
I
I
I
I
I
IO
O
O
I
O
O
I
I
IO
O
IO
IO
I
IO
O
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
FEDL610Q794-02
ML610Q794G
Polarity
—
—
—
—
—
—
—
—
—
—
—
—
Positive
—
—
—
—
—
—
Positive
—
—
—
—
Negative
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Function
Analog GND
Analog power supply
Digital IO/core GND
Digital I/O power supply
Digital core power supply
(generated by internal regulator)
Voltage regulator output for 32.768kHz crystal
Selects the interface with a host processor
I2C interface when I2C_SPISEL=1
SPI interface when I2C_SPISEL=0
SDA of I2C slave interface when I2C_SPISEL = 1
SDO of SPI slave interface when I2C_SPISEL = 0
(This pin becomes Hi-Z except during not output any data. )
I2C slave address when I2C_SPISEL = 1
SDI of SPI slave interface when I2C_SPISEL = 0
I2C slave address when I2C_SPISEL = 1
SCS of SPI slave interface when I2C_SPISEL = 0
SCL of I2C slave interface when I2C_SPISEL = 1
SCLK of SPI slave interface when I2C_SPISEL = 0
SDA of I2C master interface
SCL of I2C master interface
SDO of SPI master interface
SDI of SPI master interface
SCS of SPI master interface
SCLK of SPI master interface
Successive ADC input 1
Successive ADC input 0
Primary function: GPIO
Secondary function: Interrupt output for host interface
GPIO
Primary function: GPIO
Secondary function: RXD of Asynchronous SIO
Primary function: GPIO
Secondary function: TXD of Asynchronous SIO
GPIO
GPIO/external interrupt input
GPIO/external interrupt input
GPIO/external interrupt input
GPIO/external interrupt input
GPIO/external interrupt input
GPIO/external interrupt input
GPIO/external interrupt input
GPIO/external interrupt input
GPIO/external interrupt input
GPIO/external interrupt input
GPIO/external interrupt input
GPIO/external interrupt input
5/28
5 Page 
Parameter Register PRMn (n = 0 to 9, A to C)
PRMn
7
PRMn[7]
6
PRMn [6]
5
PRMn [5]
R/W R/W R/W R/W
Initial
Value
0
0
0
4
PRMn [4]
R/W
0
PRMn[7:0]:
This is for setting the parameters of commands.
3
PRMn [3]
R/W
0
2
PRMn [2]
R/W
0
FEDL610Q794-02
ML610Q794G
1
PRMn [1]
R/W
0
0
PRMn [0]
R/W
0
● Command Entry Register ENT
76543210
ENT
—
—
—
—
—
—
— ENT
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial
Value
0
0
0
0
0
0
0
0
ENT:
After a command is set, set this bit "1" to notify the CPU of the command. When the CPU receives the command,
this bit is cleared.
● Result Register RSLT n (n = 00 to 1F)
RSLTn
7
RSLTn[7]
6
RSLTn [6]
5
RSLTn [5]
R/W R/— R/— R/—
Initial
Value
0
0
0
4
RSLTn [4]
R/—
0
RSLTn[7:0]:
This register indicates the processing result.
3
RSLTn [3]
R/—
0
2
RSLTn [2]
R/—
0
1
RSLTn [1]
R/—
0
0
RSLTn [0]
R/—
0
● Result Register RSLT20
RSLT20
7
RSLT20[7]
6
RSLT20 [6]
5
RSLT20 [5]
4
RSLT20 [4]
3
RSLT20 [3]
2
RSLT20 [2]
1
RSLT20 [1]
0
RSLT20 [0]
R/W
Initial
Value
R/—
X
R/—
X
R/—
X
R/—
X
R/—
X
R/—
X
R/—
X
R/—
X
RSLT20[7:0]:
This register indicates the processing result. As this register has a FIFO structure, read data with the given size.
This register can be written from a host processor only when using firmware update software which SDK offers.
For details. please refer to a [ML610Q793 SDK firmware updates software manuals].
11/28
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet ML610Q794G.PDF ] | |
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