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PDF ML620Q538 Data sheet ( Hoja de datos )
| Número de pieza | ML620Q538 | |
| Descripción | Ultra Low Power 16-bit Microcontroller | |
| Fabricantes | LAPIS Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ML620Q538 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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ML620Q53x/54x/Q55x (x:6,8)
Ultra Low Power 16-bit Microcontroller
PEDL620Q53x_54x_55x-06
Issue Date：July 30,2015
Preliminary
GENERAL DESCRIPTION
This LSI family is a high-performance 16-bit CMOS microcontroller into which rich peripheral circuits, such as synchronous
serial port, UART, I2C bus interface (master), supply voltage level detect circuit, RC oscillation type A/D converter, and
successive approximation type A/D converter are incorporated around 16-bit CPU nX-U16/100.
The CPU nX-U16/100 is capable of efficient instruction execution in 1-instruction 1-clock mode by 3-stage pipe line
architecture parallel processing. The rich peripheral circuits such as I/O port, Serial interface and Timers are installed. So this
LSI family is most suitable for consumer and industry devices that are required for multi-actuation system. And, this LSI has a
data flash-memory fill area by software which can be written in.
The on-chip debug function that is installed enables program debugging and programming.
FEATURES
• CPU
− 16-bit RISC CPU (CPU name: nX-U16/100)
− Instruction system: 16-bit instructions
− Instruction set: Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit operation, bit
logic operations, jump, conditional jump, call return stack operation, arithmetic shift, and so on.
− On-Chip debugs function
− Minimum instruction execution time
30.5 µs (@ 32.768 kHz system clock)
62.5 ns (@16 MHz system clock)
• Built-in coprocessor for multiplication, division, and multiply-accumulate operations
− Signed or unsigned operation setting
− Multiplication: 16 bit x 16 bit (operation time 4 cycles)
− Division: 32 bit / 16 bit (operation time 8 cycles)
− Division: 32 bit / 32 bit (operation time 16 cycles)
− Multiply-accumulate (non-saturating): 16 bit x 16 bit + 32bit (operation time 4 cycles)
− Multiply-accumulate (saturating): 16 bit x 16 bit + 32 bit (operation time 4 cycles)
• Internal memory
− Supports ISP function (re-writing the program memory area by software)
− Number of segments
Product name
Flash memory
Program area*
Data area
ML620Q558
256KB (128K × 16bit)
2KB (1K × 16bit)
ML620Q556
128KB (64K × 16bit)
2KB (1K × 16bit)
ML620Q548
256KB (128K × 16bit)
2KB (1K × 16bit)
ML620Q546
128KB (64K × 16bit)
2KB (1K × 16bit)
ML620Q538
256KB (128K × 16bit)
2KB (1K × 16bit)
ML620Q536
128KB (64K × 16bit)
2KB (1K × 16bit)
*: including 1KB of unusable test area
SRAM
20KB (10K × 16bit)
10KB (5K × 16bit)
20KB (10K × 16bit)
10KB (5K × 16bit)
20KB (10K × 16bit)
10KB (5K × 16bit)
STATUS
Under developing
Under planning
Under planning
Under developing
Under planning
Under planning
• Interrupt controller (INTC)
− 1 non-makeable interrupt sources (Internal source: WDT)
− 52 makeable interrupt sources (Internal sources: 44, External sources: 8)
− External interrupts and comparator allow edge selection and sampling selection
− Priority level (4-level) can be set for each interrupt
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1 page  
PEDL620Q53x_54x_55x-06
ML620Q53x/54x/55x
BLOCK DIAGRAM
ML620Q536/538/546/548/556/558/ Block Diagram
EPSW1~3
PSW
Timing
Controller
On-Chip
ICE
CPU (nX-U16/100)
GREG
0~15
ELR1~3
LR
EA
ALU
SP
Instruction
Decoder
Instruction
Register
ESCR1~3
DSR/CSR
PC
BUS
Controller
Co-Processor
(muldiv)
Program
Memory
(Flash)
128K/256KByte
VSS
VDD
VDDL
VDDX
RESET_N
TEST0
TEST1_N
XT0*
XT1*
OSC0*
OSC1*
LSCLK*
OUTCLK*
IN0*
CS0*
RS0*
RT0*
CRT0*
RCM*
IN1*
CS1*
RS1*
RT1*
VREF
AIN0 toAIN19*
(ML620Q54x/55x)
AIN4toAIN19*
(ML620Q53x)
CMP0P*
CMP0M*
CMP1P*
CMP1M*
Power
RAM
10K/20KB
RESET
&
TEST
Data Flash
2KB
OSC
INT
Interrupt
Controller
INT
High Speed
RC-OSC
(16MHz)
Low Speed
RC-OSC
(32.768kHz)
RC-ADC
x2
INT
3
INT
INT
INT
3
WDT
LTBC x 2
VLS
LLD
RTC
SA-ADC
INT
Analog
Comparator
x2
INT
2
INT
12
INT
8
Timer
8bit x 12
Multi-Functi
on Timer
16bit x8
TMOUT0 to
TMOUTB *
FTMOUT0 to F*
FTMOUT10 to 1F*
TMCKI*
INT Motor PWM
1
16bit x1
INT
2
SSIO-F
x2
INT
4
UART-F x4
INT
2
UART x1
INT
2
I2C x2
INT
1
Melody
PWM_U*
PWM_UB*
PWM_V*
PWM_VB*
PWM_W*
PWM_WB*
PWM_GB*
PWM_GBLB*
SCKF0*
SCKF1*
SINF0*
SINF1*
SOUTF0*
SOUTF1*
SSF0*
SSF1*
RXDF0 to
RXDF3*
TXDF0 to
TXDF3*
RXD0*
TXD0*
SDA0*
SDA1*
SCL0*
SCL1*
BZ*
INT
8
GPIO
PXT0 to PXT1
P00 to PC3
(ML620Q55x)
P00 to P97
(ML620Q54x)
P00 to P33,P40toP53
P60toP77,P90toP97
(ML620Q53x) x:6,8
* ： 2nd/3rd/4th/5th function
5/9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet ML620Q538.PDF ] | |
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