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Número de pieza | SM3321A | |
Descripción | Optical Sensor IC | |
Fabricantes | NPC | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de SM3321A (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
No Preview Available ! SM3321A
Optical Sensor IC
OVERVIEW
The SM3321A is an image sensor IC with a built-in single element photodiode of 0.5mm2. The IC can detect range of light wave from
visible to infrared in itself. It is a superior sensor with noise immunity to integrate photodetection circuits which consist of photodiodes and
operational amplifiers. The gain of amplifiers in SM3321A is settable by setting external terminals, so that it can detect range of light wave
from visible to infrared with high sensitivity.
FEATURES
▪ High-sensitivity preamplifier for visible to infrared detection using
a single IC
▪ Gain setting and output control function by pin terminal setting
(GS0, GS1, GS2, OEN)
▪ Transimpedance range: 2MΩ to 48MΩ
▪ Photodiode detector size: 0.22mm×2.34mm
(0.5mm2 photodetector surface area)
▪Anti-reflection film coating with little sensitivity changing by wavelength
▪ Supply voltage range: 3.0 to 5.5V (single supply)
▪ Current consumption: 1.0mA(typ)@VDD=5V, no load
▪ Operating temperature range: -40 to +85°C
▪ Package: 8 pin HCOB
ORDERING INFORMATION
Device
Package
SM3321A
8 pin HCOB
PACKAGE DIMENSIONS
(Unit: mm)
2.8±0.1
1.65±0.15
IC chip
Pin No.1
A
R0.15
B
Photodiode
Top View
1.13±0.2
0.6±0.1
Photodiode detector dimensions
Origin: IC center unit : [mm]
XY
A 0.40
1.17
B 0.18 -1.17
Package type : 8pin HCOB
Package size : 2.8mm×3.05mm
Photodiode detector size : 0.22mm×2.34mm
(0.5mm2 photo detector surface area)
TYPICAL APPLICATION CIRCUIT
GS2
GS1
GS0
SM3321A -1
4.7μF
SM3321A -2
4.7μF
SM3321A -3
4.7μF
SM3321A -4
4.7μF
CPU
A/D
E0
E1
E2
E3
SEIKO NPC CORPORATION - 1
1 page SM3321A
Analog Electrical Characteristics
Reference circuit with recommended operating conditions, unless otherwise specified
Parameter
Symbol
Conditions
Rating
MIN TYP MAX
Unit
Pre-amplifier transimpedance
Post-amplifier gain differential
GS2=0V input
Rti GS2=VDD input
Gdiff
Gain differential relative to
GS[2:0] gain settings
0.4 0.5 0.6 MΩ
2.4 3 3.6 MΩ
-1 1 dB
Dark voltage
VOD1
VOD2
VDD=5.0V, Ta=25°C
VDD=5.0V, Ta=85°C
20 mV
50 mV
AC Characteristics
Reference circuit with recommended operating conditions, unless otherwise specified
Parameter
Symbol
Conditions
MIN TYP MAX Unit
Settling time1
80pF OUT output load, Time for output
to reach 95% amplitude*1
tst1 GS2=0V
(Transimpedance:
2MΩ,3.2 MΩ,5 MΩ,8 MΩ)
5 10 μs
Settling time2
80pF OUT output load, Time for output
to reach 95% amplitude*1
tst2 GS2= VDD
(Transimpedance:
12MΩ,19.2 MΩ,30 MΩ,48 MΩ)
Output voltage stabilization time*2
Output disable time*3
tw ≤ 5% output variation*1
tz OUT
Interface wait time
Input capacitance*4
Output capacitance*4
tsi ―
CI OEN, GS0, GS1, GS2
CO OUT
10
*1. OUT output presumed to reach reference value 100μs after output enable.
*2.An output voltage error may occur if the output hold time does not satisfy rated value.
*3. Design value, provided as a guide for the output control time.
*4. Design value, representing the capacitance per terminal. Provided as a guide for when designing circuit boards.
18 30 μs
1000 μs
0.1 μs
μs
3 pF
3.5 pF
OEN
0.5VDD
0.5VDD
0.5VDD
OUT
tst1, tst2 100μs
tW
95% 100%
tZ
100±5%
AC characteristics
tsi
SEIKO NPC CORPORATION - 5
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet SM3321A.PDF ] |
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