|
|
Número de pieza | HX8340-A | |
Descripción | TFT Mobile Single Chip Driver | |
Fabricantes | Himax | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HX8340-A (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! DATA SHEET
( DOC No. HX8340-A-DS )
HX8340-A
176RGB x 220 dot, 262K color,
with internal GRAM,
TFT Mobile Single Chip Driver
Preliminary version 02 September, 2006
1 page HX8340-A
176RGB x 220 dot, 262K color, with internal
GRAM, TFT Mobile Single Chip Driver
List of Figures
September, 2006
Figure 5. 20 Grayscale Control ...................................................................................................... 65
Figure 5. 21 Structure of Grayscale Voltage Generator................................................................. 66
Figure 5. 22 Gamma Resister Stream and Gamma Reference Voltage ....................................... 68
Figure 5. 23 Relationship between Source Output and Vcom....................................................... 74
Figure 5. 24 Relationship between GRAM Data and Output Level ............................................... 74
Figure 5. 25 Oscillation Circuit ....................................................................................................... 75
Figure 6. 1 80-System Interface Mode........................................................................................... 78
Figure 6. 2 Index Register.............................................................................................................. 79
Figure 6. 3 Status Read Register................................................................................................... 79
Figure 6. 4 Start Oscillation Register (R00h) ................................................................................. 79
Figure 6. 5 Driver Output Control Register (R01h) ........................................................................ 79
Figure 6. 6 LCD-Driving-Waveform Control Register (R02h)......................................................... 81
Figure 6. 7 Entry Mode Register (R03h) ........................................................................................ 81
Figure 6. 8 Address Direction Settings........................................................................................... 82
Figure 6. 9 The Setting of DFM and TRI (80-system 16-bit Interface)........................................... 83
Figure 6. 10 The Setting of DFM and TRI (80-system 8-bit Interface)........................................... 84
Figure 6. 11 The Setting of DFM and TRI (Serial Data Transfer Interface).................................... 84
Figure 6. 12 Compare Register 1 (R04h)....................................................................................... 85
Figure 6. 13 Compare Register 2 (R05h)....................................................................................... 85
Figure 6. 14 Bit Operation .............................................................................................................. 85
Figure 6. 15 Display Control Register 1 (R07h) ............................................................................. 86
Figure 6. 16 Display Control Register 2 (R08h) ............................................................................. 88
Figure 6. 17 BP/FP......................................................................................................................... 89
Figure 6. 18 Display Control Register 3 (R09h) ............................................................................. 90
Figure 6. 19 Frame Cycle Control Register (R0Bh) ....................................................................... 90
Figure 6. 20 Equalized Period and Source Output Delay .............................................................. 92
Figure 6. 21 Non-overlap Time between Two Adjacent Gate Output Pulses................................. 93
Figure 6. 22 External Display Interface Control Register (R0Ch) .................................................. 93
Figure 6. 23 Power Control Register 1 (R10h)............................................................................... 94
Figure 6. 24 Power Control Register 2 (R11h) ............................................................................... 96
Figure 6. 25 Power Control Register 3 (R12h)............................................................................... 98
Figure 6. 26 Power Control Register 4 (R13h)............................................................................... 98
Figure 6. 27 RAM Address Register (R21h) ................................................................................ 100
Figure 6. 28 Write Data Register (R22h)...................................................................................... 100
Figure 6. 29 Input Data Written to GRAM through Write Data Register in 18-bit Interface Mode 101
Figure 6. 30 Input Data Written to GRAM through Data Register in 16-bit Interface Mode......... 101
Figure 6. 31 Input Data Written to GRAM through Data Register in 9-bit Interface Mode........... 102
Figure 6. 32 Input Data Written to GRAM through Write Data Register in 8-bit Interface Mode . 102
Figure 6. 33 Input Data Written to GRAM through Write Data Register in 18-/16-/6-bit RGB ..... 103
Figure 6. 34 Read Data Register (R22h) ..................................................................................... 105
Figure 6. 35 Output Data Read from GRAM through Read Data Register in 18-bit Interface..... 105
Figure 6. 36 Output Data Read from GRAM through Read Data Register in 16- /9- /8-bit Interface
.............................................................................................................................................. 106
Figure 6. 37 Flow Chart of GRAM Read Data.............................................................................. 107
Figure 6. 38 Write Data Mask Register 1 (R23h) ......................................................................... 107
Figure 6. 39 Write Data Mask Register 1 (R24h) ......................................................................... 107
Figure 6. 40 GRAM Write Data Mask........................................................................................... 108
Figure 6. 41 Gamma Control Register 1~10 (R30h~R39h) ......................................................... 108
Figure 6. 42 Gate Scan Position Register (R40h)........................................................................ 109
Figure 6. 43 SCN Bits and Scanning Start Position for Gate Driver ............................................ 109
Figure 6. 44 Vertical Scroll Control Register (R41h) .....................................................................110
Figure 6. 45 First Screen Driving Position Register (R42h) ..........................................................110
Figure 6. 46 Second Screen Driving Position Register (R43h).....................................................110
Figure 6. 47 Horizontal RAM Address Position Register (R44h) .................................................. 111
Himax Confidential
-P.4-
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax. Subject to change without notice.
September, 2006
5 Page HX8340-A
176RGB x 220 dot, 262K color, TFT Mobile Single Chip Driver
3. Device Overview
3.1 Block Diagram
DATA SHEET Preliminary V02
ENABLE HSYNC
PD0~17 DOTCLKVSYNC
Vcc
VSSD
IM3~1
IM 0, /ID
NCS
RS
E_NWR
RW_NRD
DB0/SDI,
DB1/SDO,
~ DB17
nRESET
TEST1
TEST2
TS7~0
VDDD
IOVCC
Index
Register
(IR)
7 18
Control
Register
(CR)
External display
Interface
System
Address Counter
(AC)
Interface
-18-bit
-16-bit
-9-bit
18 Graphic
Operation
18
16
-8-bit
18 -Serial
Read data Write data
18 latch
latch
18 18
Power
VDDD
Regulator
Graphic RAM
(GRAM)
87,120 bytes
OSC2
OSC1
Timing
generator
VSSD
VSSA
LCD driving power
circuit
Source
driver
M/AC
circuit
Latch
circuit
V0-63
Grayscale
voltage
generator
VGS
VTESTS
VMONI
Gamma adjusting
circuit
G1~G220
Himax Confidential
-P.10-
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax. Subject to change without notice.
September, 2006
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet HX8340-A.PDF ] |
Número de pieza | Descripción | Fabricantes |
HX8340-A | TFT Mobile Single Chip Driver | Himax |
HX8340-B | TFT Mobile Single Chip Driver | Himax |
HX8340-BT | TFT Mobile Single Chip Driver | Himax |
Número de pieza | Descripción | Fabricantes |
SLA6805M | High Voltage 3 phase Motor Driver IC. |
Sanken |
SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |