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PDF NTSX2102 Data sheet ( Hoja de datos )
| Número de pieza | NTSX2102 | |
| Descripción | Dual supply translating transceiver | |
| Fabricantes | NXP Semiconductors | |
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NTSX2102
Dual supply translating transceiver; open drain; auto
direction sensing
Rev. 2 — 11 February 2013
Product data sheet
1. General description
The NTSX2102 is a 2-bit, dual supply translating transceiver with auto direction sensing,
that enables bidirectional voltage level translation. It features two 2-bit input-output ports
(An and Bn), one output enable input (OE) and two supply pins (VCC(A) and VCC(B)). Both
supplies can be supplied at any voltage between 1.65 V and 5.5 V. This flexibility makes
the device suitable for translating between any of the voltage nodes (1.8 V, 2.5 V, 3.3 V
and 5.0 V). Pins An and OE are referenced to VCC(A) and pins Bn are referenced to VCC(B).
A LOW level at pin OE causes the outputs to assume a high-impedance OFF-state. This
device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing the damaging backflow current through the device when it
is powered down.
2. Features and benefits
Wide supply voltage range:
VCC(A): 1.65 V to 5.5 V and VCC(B): 1.65 V to 5.5 V
Maximum data rates:
50 Mbps
IOFF circuitry provides partial Power-down mode operation
Inputs accept voltages up to 5.5 V
ESD protection:
HBM JS-001 Class 2 exceeds 2000 V
CDM JESD22-C101E exceeds 2000 V
Latch-up performance exceeds 100 mA per JESD 78B Class II
Multiple package options
Specified from 40 C to +85 C
3. Applications
I2C/SMBus
UART
GPIO
1 page  
NXP Semiconductors
NTSX2102
Dual supply translating transceiver; open drain; auto direction sensing
Table 6.
Symbol
Tamb
t/V
Recommended operating conditions[1] …continued
Parameter
Conditions
ambient temperature
input transition rise and fall rate A, B or OE port
VCC(A) = 1.65 V to 5.5 V;
VCC(B) = 1.65 V to 5.5 V
Min
40
-
[1] Hold the A and B sides of an unused I/O pair in the same state, both at VCCI or both at GND.
11. Static characteristics
Max Unit
+85 C
10 ns/V
Table 7. Typical static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C.
Symbol Parameter
Conditions
Min Typ
CI input
OE input; VCC(A) = VCC(B) = 0 V
capacitance
- 2.2
CI/O input/output
capacitance
A or B port; VCC(A) = 5.0 V; VCC(B) = 5.0 V
- 10
Max Unit
- pF
- pF
[1] VCCO is the supply voltage associated with the output.
Table 8. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
40 C to +85 C
Unit
Min Max
VIH HIGH-level input A or B port
voltage
VCC(A) = 1.65 V to 5.5 V; VCC(B) = 1.65 V to 5.5 V [1] VCCI 0.4
OE input
-V
VCC(A) = 1.65 V to 5.5 V; VCC(B) = 1.65 V to 5.5 V
0.65VCC(A)
-V
VIL LOW-level input A or B port
voltage
VCC(A) = 1.65 V to 5.5 V; VCC(B) = 1.65 V to 5.5 V
- 0.4 V
OE input
VCC(A) = 1.65 V to 5.5 V; VCC(B) = 1.65 V to 5.5 V
-
VOL LOW-level output A or B port; IO = 6 mA
voltage
VI 0.15 V; VCC(A) = 1.65 V to 5.5 V;
VCC(B) = 1.65 V to 5.5 V
[2]
-
II
input leakage
OE input; VI = 0 V to VCC(A); VCC(A) = 1.65 V to 5.5 V;
current
VCC(B) = 1.65 V to 5.5 V
-
IOZ
OFF-state output A or B port; VO = 0 V or VCCO; VCC(A) = 0 V to 5.5 V; [2]
-
current
VCC(B) = 0 V to 5.5 V
IOFF power-off leakage A port; VI or VO = 0 V to 5.5 V;
current
VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V
-
B port; VI or VO = 0 V to 5.5 V;
VCC(B) = 0 V; VCC(A) = 0 V to 5.5 V
-
0.35VCC(A) V
0.4 V
1 A
2 A
2 A
2 A
NTSX2102
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 11 February 2013
© NXP B.V. 2013. All rights reserved.
5 of 20
5 Page 
NXP Semiconductors
NTSX2102
Dual supply translating transceiver; open drain; auto direction sensing
14. Application information
14.1 Applications
The NTSX2102 can be used in point-to-point applications to interface between devices or
systems operating at different supply voltages. The device is targeted at I2C or 1-wire
buses which use open-drain drivers.
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Fig 8. Typical voltage level-translation circuit
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14.2 Architecture
The architecture of the NTSX2102 is shown in Figure 9. The device does not require an
extra input signal to control the direction of data flow from A to B or B to A. The NTSX2102
is a "switch" type voltage translator, it employs two key circuits to enable voltage
translation:
1. Two pass-gate transistors (N-channel) that tie the ports together.
2. An output edge-rate accelerator that detects and accelerates rising and falling edges
on the I/O pins (see Figure 10).
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Fig 9. Architecture of NTSX2102 I/O cell (one channel)
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DDD
NTSX2102
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 11 February 2013
© NXP B.V. 2013. All rights reserved.
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