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PDF NX3DV642 Data sheet ( Hoja de datos )
| Número de pieza | NX3DV642 | |
| Descripción | 3-lane high-speed MIPI compatible switch | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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NX3DV642
3-lane high-speed MIPI compatible switch
Rev. 1 — 20 August 2012
Product data sheet
1. General description
The NX3DV642 is a high-speed triple-pole double-throw differential signal switch. The
device is optimized for switching between two MIPI devices, such as cameras or LCD
displays and on-board multimedia application processors.
The NX3DV642 is compatible with the requirements of Mobile Industry Processor
Interface (MIPI). The low capacitance design allows the NX3DV642 to switch signals that
exceed 500 MHz in frequency
2. Features and benefits
Supply voltage range from 2.65 V to 4.3 V
7.5 typical ON resistance
8.4 pF typical ON capacitance
950 MHz typical bandwidth or data frequency
Low crosstalk of 55 dB at 100 MHz
Break-before-make switching
ESD protection:
HBM JESD22-A114F Class 2 exceeds 2000 V
CDM AEC-Q100-011 revision B exceeds 1000 V
HBM exceeds 12000 V for power to GND protection
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
Specified from 40 C to +85 C
3. Applications
Dual camera applications for cell phones
Dual LCD applications for cell phones, digital camera displays and viewfinders
4. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
NX3DV642GU
40 C to +85 C XQFN24
Description
plastic, extremely thin quad flat package; no leads;
24 terminals; body 2.5 x 3.4 x 0.5 mm
Version
SOT1310-1
1 page  
NXP Semiconductors
NX3DV642
3-lane high-speed MIPI compatible switch
11. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
Conditions
Tamb = 40 C to +85 C
Min Typ[1] Max
VIH HIGH-level input VCC = 2.65 V to 2.775 V
voltage
VCC = 4.3 V
VIL LOW-level input VCC = 2.65 V to 2.775 V
voltage
VCC = 4.3 V
VIK
input clamping
VCC = 2.775 V; II = 18 mA
voltage
1.3 -
1.7 -
--
--
1.2 -
-
-
0.5
0.7
-
II
IS(OFF)
input leakage
current
OFF-state leakage
current
pins S and OE; VI = GND to 4.3 V;
VCC = 4.3 V
VCC = 4.3 V; see Figure 4
- - 1
- - 2
IOFF power-off leakage VI or VO = 0 V to 4.3 V; VCC = 0 V
current
- - 2
ICC
ICC
supply current
additional supply
current
VI = VCC or GND; VSW = GND or
VCC; VCC = 4.3 V
VI = 1.8 V; VSW = GND or VCC;
VCC = 2.775 V
- -2
- - 1.5
Unit
V
V
V
V
V
A
A
A
A
A
CI input capacitance pins S and OE
- 1.3 - pF
CS(OFF)
OFF-state
pins CLK1n, CLK2n, 1D1n 1D2n,
[2] -
3.0
- pF
capacitance
2D1n and 2D2n; VI = 0 V to 3.3 V
CS(ON)
ON-state
capacitance
pins CLKn, 1Dn and 2Dn;
VI = 0 V to 3.3 V
[2] - 8.4 - pF
[1] Typical values are measured at Tamb = 25 C and VCC = 2.775 V.
[2] n = + or .
11.1 Test circuits
VIL or VIH
VIH
VCC
S
1Dn
OE
1D1n 1
1D2n 2
GND
switch
switch
1
2
IS
S
VIL
VIH
VI VO
aaa-002570
Fig 4.
VI = VCC or GND and VO = GND or VCC.
Test circuit also applies for 2Dn, 2D1n, 2D2n CLKn, CLK1n and CLK2n (n = + or ).
Test circuit for measuring OFF-state leakage current
NX3DV642
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 August 2012
© NXP B.V. 2012. All rights reserved.
5 of 16
5 Page 
NXP Semiconductors
NX3DV642
3-lane high-speed MIPI compatible switch
0.5 VCC
CLK+, nD+
CHANNEL
ON
RL
CLK1+ or nD1+
fi 50 Ω
V VO1
VIL S
0.5 VCC
CLK-, nD-
Ri
50 Ω
CHANNEL
OFF
CLK2- or nD2-
RL
V VO2
20 log10 (VO2 / VO1) or 20 log10 (VO1 / VO2).
Fig 12. Test circuit for measuring crosstalk between switches
aaa-002577
NX3DV642
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 August 2012
© NXP B.V. 2012. All rights reserved.
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