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HK24C64 데이터시트 PDF




Hang Shun chip technology에서 제조한 전자 부품 HK24C64은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 HK24C64 자료 제공

부품번호 HK24C64 기능
기능 Two-Wire Serial EEPROM
제조업체 Hang Shun chip technology
로고 Hang Shun chip technology 로고


HK24C64 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




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HK24C64 데이터시트, 핀배열, 회로
Two-Wire Serial EEPROM
32K, 64K (8-bit wide)
FEATURES
Low voltage and low power operations:
HK24C32/HK24C64:
VCC = 1.8V to 5.5V
Maximum Standby current < 1µA (typically 0.02µA and 0.06µA @ 1.8V and 5.5V respectively).
32 bytes page write mode.
Partial page write operation allowed.
Internally organized: 4,096 × 8 (32K), 8,192 × 8 (64K).
Standard 2-wire bi-directional serial interface.
Schmitt trigger, filtered inputs for noise protection.
Self-timed Write Cycle (5ms maximum).
800 kHz (5V), 400 kHz (1.8V, 2.5V, 2.7V) Compatibility.
Automatic erase before write operation.
Write protect pin for hardware data protection.
High reliability: typically 1, 000,000 cycles endurance.
100 years data retention.
Industrial temperature range (-40to 85).
Standard 8-lead DIP/SOP/ MSOP/TSSOP/DFN and 5-lead SOT23/TSOT23 Pb-free packages.
DESCRIPTION
The HK24C32/24C64 series are 32,768/65,536 bits of serial Electrical Erasable and Programmable Read
Only Memory, commonly known as EEPROM. They are organized as 4096/8192 words of 8 bits (one byte)
each. The devices are fabricated with proprietary advanced CMOS process for low power and low voltage
applications. These devices are available in standard 8-lead DIP, 8-lead SOP, 8-lead MSOP, 8-lead
TSSOP, 8-lead DFN, 5-lead SOT23, and 5-lead TSOT23 packages. A standard 2-wire serial interface is
used to address all read and write functions. Our extended VCC range (1.8V to 5.5V) devices enables wide
spectrum of applications.
PIN CONFIGURATION
Pin Name
A2, A1, A0
SDA
SCL
WP
NC
Pin Function
Device Address Inputs
Serial Data Input / Open Drain Output
Serial Clock Input
Write Protect
No-Connect




HK24C64 pdf, 반도체, 판매, 대치품
(E) STANDBY MODE
The EEPROM goes into low power STANDBY mode after a fresh power up, after receiving a STOP bit
in read mode, or after completing a self-time internal programming operation.
Figure 1: Timing diagram for START and STOP conditions
SCL
SDA
START
Condition
Data Data
Valid Transition
STOP
Condition
Figure 2: Timing diagram for output ACKNOWLEDGE
START Condition
SCL
Data in
Data out
ACK
DEVICE ADDRESSING
The 2-wire serial bus protocol mandates an 8 bits device address word after a START bit condition to invoke
a valid read or write command. The first four most significant bits of the device address must be 1010,
which is common to all serial EEPROM devices. The next three bits are device address bits. These three
device address bits (5th, 6th and 7th) are to match with the external chip select/address pin states. If a match
is made, the EEPROM device outputs an ACKNOWLEDGE signal after the 8th read/write bit, otherwise the
chip will go into STANDBY mode. However, matching may not be needed for some or all device address
bits (5th, 6th and 7th) as noted below. The last or 8th bit is a read/write command bit. If the 8th bit is at VIH
then the chip goes into read mode. If a “0” is detected, the device enters programming mode.

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HK24C64 전자부품, 판매, 대치품
S
T
A
R DEVICE
T ADDRESS
R
E
A
D
SDA LINE
M LRA
S S/C
B B WK
Figure 5: Current Address Read
DATA
S
T
O
P
N
O
A
C
K
SDA LINE
DEVICE
ADDRESS
R
E
A
D
Figure 6: Sequential Read
DATA (N)
DATA (N+1)
DATA (N+2)
DATA (N+3)
S
T
O
P
RA A A A N
/C C C C O
WK K K K
A
C
K
Figure 7: Random Read
S
T
A
R DEVICE
T ADDRESS
SDA LINE
W
R
I
T FIRST WORD
E ADDRESS(N)
***#
SECOND WORD
ADDRESS(N)
S
T
A
R DEVICE
T ADDRESS
R
E
A
D
M
LRA
M
A
S
S/C
S
C
B
B WK
B
K
LA M
SC S
BK B
LRA
S/C
B WK
Notes: 1) * = Don’t Care bits
2) # = Don’t Care bits for HK24C32
DATA (N)
S
T
O
P
N
O
A
C
K

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부품번호상세설명 및 기능제조사
HK24C64

Two-Wire Serial EEPROM

Hang Shun chip technology
Hang Shun chip technology

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