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PDF MST6M48RHS Data sheet ( Hoja de datos )
| Número de pieza | MST6M48RHS | |
| Descripción | All-in-one LCD TV Controller | |
| Fabricantes | MStar Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MST6M48RHS (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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Doc. No.: 2010020199
PIN DIAGRAM (MST6M48RHS)
MST6M48RHS
All-in-one LCD TV Controller
Preliminary Pin Diagram and Description Version 0.2
HWRESET
HOTPLUGB
RXBCKN
RXBCKP
RXB0N
RXB0P
AVDD_ALIVE
RXB1N
RXB1P
DDCDB_DA
RXB2N
RXB2P
DDCDB_CK
RXACKN
RXACKP
RXA0N
RXA0P
DDCDA_DA
RXA1N
RXA1P
DDCDA_CK
RXA2N
RXA2P
VDDC
HSYNC0
BIN0P
SOGIN0
GIN0P
GIN0M
RIN0P
VSYNC0
VDDC
AVDD_25
BIN1P
SOGIN1
GIN1P
GIN1M
RIN1P
AVDD_33
CVBS4
CVBS3
CVBS2
CVBS1
CVBS0
VCOM
CVBSOUT0
AUL0
AUR0
AUL1
AUR1
AUVRM
AUVRP
AUVAG
AVDD_AU25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
Pin 1
162 DVDD_DDR
161 DQSLZ
160 DQSL
159 AVDD_DDR
158 DQML
157 DQMU
156 MDATA[14]
155 MDATA[9]
154 MDATA[12]
153 AVDD_DDR
152 MDATA[11]
151 MDATA[6]
150 MDATA[1]
149 MDATA[3]
148 AVDD_DDR
147 MDATA[4]
146 WEZ
145 MCLKE
144 BADR[1]
143 BADR[0]
142 AVDD_DDR
141 BADR[2]
140 MADR[1]
139 MADR[10]
138 MADR[3]
137 MADR[5]
136 MADR[7]
135 MADR[9]
134 MADR[12]
133 VDDC
132 PWM1
131 PWM0
130 VDDP
129 I2S_OUT_MUTE
128 I2S_IN_BCK
127 I2S_IN_SD
126 I2S_IN_WS
125 AVDD_MEMPLL
124 AVDD_MOD
123 VDDC
122 LVB0M
121 LVB0P
120 LVB1M
119 LVB1P
118 LVB2M
117 LVB2P
116 LVBCKM
115 LVBCKP
114 LVB3M
113 LVB3P
112 LVB4M
111 LVB4P
110 LVA0M
109 LVA0P
Doc. No.: 2010020199
-1-
Copyright © 2010 MStar Semiconductor, Inc. All rights reserved.
2/11/2010
1 page  
Doc. No.: 2010020199
Pin Name
RXA0N
RXA0P
RXA1N
RXA1P
RXA2N
RXA2P
RXBCKN
RXBCKP
RXB0N
RXB0P
RXB1N
RXB1P
RXB2N
RXB2P
Pin Type
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
DVI/HDMI Input
MST6M48RHS
All-in-one LCD TV Controller
Preliminary Pin Diagram and Description Version 0.2
Function
Negative DVI/HDMI Input for A Link Data Channel 0
Positive DVI/HDMI Input for A Link Data Channel 0
Negative DVI/HDMI Input for A Link Data Channel 1
Positive DVI/HDMI Input for A Link Data Channel 1
Negative DVI/HDMI Input for A Link Data Channel 2
Positive DVI/HDMI Input for A Link Data Channel 2
Negative DVI/HDMI Input for B Link Clock Channel
Positive DVI/HDMI Input for B Link Clock Channel
Negative DVI/HDMI Input for B Link Data Channel 0
Positive DVI/HDMI Input for B Link Data Channel 0
Negative DVI/HDMI Input for B Link Data Channel 1
Positive DVI/HDMI Input for B Link Data Channel 1
Negative DVI/HDMI Input for B Link Data Channel 2
Positive DVI/HDMI Input for B Link Data Channel 2
Pin
16
17
19
20
22
23
3
4
5
6
8
9
11
12
Serial Flash Interface
Pin Name
SCK
SDI
SDO
SCZ
IRIN
Pin Type
Output
Output
Input w/ 5V-tolerant
Output
Input w/ 5V-tolerant
Function
SPI Flash Serial Clock
SPI Flash Serial Data Input
SPI Flash Serial Data Output
SPI Flash Chip Select
IR Receiver Input
Pin
201
202
203
204
215
GPIO Interface
Pin Name
GPIO[42:41]
GPIO[44]
GPIO[54:52]
GPIO[6]
Pin Type
I/O w/ 5V-tolerant
I/O w/ 5V-tolerant
I/O w/ 5V-tolerant
I/O
GPIO[7]
GPIO[8]
I/O
I/O
Function
General Purpose Input/Output; 4mA driving strength
General Purpose Input/Output; 4mA driving strength
General Purpose Input/Output; 4mA driving strength
General Purpose Input/Output /
Word Select Output; 4mA driving strength
(I2S_OUT_WS) /
Universal Asynchronous Transmitter 0 (UART0_TX)
General Purpose Input/Output; 4mA driving strength
General Purpose Input/Output /
Universal Asynchronous Receiver 0 (UART0_RX)
Pin
83, 82
88
93-91
211
212
213
Doc. No.: 2010020199
-5-
Copyright © 2010 MStar Semiconductor, Inc. All rights reserved.
2/11/2010
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet MST6M48RHS.PDF ] | |
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