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부품번호 | PAM8408 기능 |
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기능 | 2 x 3W Stereo Differential Input Class D Audio Amplifier | ||
제조업체 | Diodes | ||
로고 | |||
전체 11 페이지수
A PRODUCT LINE OF
DIODES INCORPORATED
PAM8408
2x3W STEREO DIFFERENTIAL INPUT CLASS D
AUDIO AMPLIFIER WITH MEMORY UP/DOWN VOLUME
Description
The PAM8408 is a filter-less Class-D amplifier with high SNR and
differential input that helps eliminate noise. Advanced 32-step
Up/Down volume control minimizes external components and allows
speaker volume control. The gain will held when the chip is in
shutdown mode.
The PAM8408 supports 2.5V to 6V operation make it idea for up to
4 cells alkaline battery applications.
Features like greater than 87% efficiency and small PCB area make
the PAM8408 Class-D amplifier ideal for portable applications. The
output uses a filter-less architecture minimizing the number of
external components and PCB area whilst providing a high
performance, simple and lower cost system.
The PAM8408 built in auto recovery SCP (short circuit protection) and
thermal shutdown.
The PAM8408 is available in SO-16L package.
Features
• 3W Output at 10% THD with a 4Ω Load and 5V Supply
• 2.4W Output at 1% THD with a 4Ω Load and 5V Supply
• 2.5V to 6.0V VDD Operating
• Fully Differential Input
• Filter-less, Low Quiescent Current and Low EMI
• Low THD+N
• 32-Step Memory Up/Down Volume Control from -80dB to 24dB
• Superior Low Noise: 60uV
• Minimize Pop/Clip Noise
• Auto Recovery Short Circuit Protection
• Thermal Shutdown
• Pb-Free SO-16L Package
Pin Assignments
SO-16L
RINP
RINN
SD
UP
DOWN
GND
LINN
LINP
1
2
3
4
5
6
7
8
Applications
• PC Speaker
• Wireless Speaker
• Home Sound Systems
• Active Speakers
• Docking Stations
16 VDD
15 ROUTP
14 ROUTN
13 GND
12 GND
11 LOUTN
10 LOUTP
9 VDD
Typical Applications Circuit
RINP
RINN
C5
0.1uF
C6
0.1uF
ON
SHDN
LINN
LINP
C7
0. 1uF
C8
0.1uF
1 RINP
VDD 16
2 RINN
ROUTP 15
3 SD
ROUTN 14
4 UP
PAM8408 GND 13
5 DOWN
GND 12
6 GND
7 LINN
8 LINP
LOUTN 11
LOUTP 10
VDD 9
VDD
C2
1uF
4Ω
4Ω
C2
1uF
VDD
PAM8408
Document number: DS36992 Rev. 1 - 2
1 of 11
www.diodes.com
June 2014
© Diodes Incorporated
A PRODUCT LINE OF
DIODES INCORPORATED
PAM8408
Performance Characteristics (@TA = +25°C, VDD = 5V, Gain = 24dB, RL = 8Ω (33μH)+R+L(33μH), unless otherwise noted.)
THD+N Vs. Output Power (RL=8Ω)
20
10
5
2
1
% 0.5
0.2
0.1
0.05
0.02
0.01
1m
f=100Hz/1kHz/10kHz
(Red/Pink/Blue)
2m
5m 10m 20m
50m
100m
200m
W
500m
1
23
THD+N Vs. Output Power (RL=4Ω)
40
20
10
5
2
1
%
0.5
0.2
0.1
0.05
0.02
0.01
1m
f=100Hz/1kHz/10kHz
(Red/Pink/Blue)
2m
5m 10m 20m
50m
100m
200m
W
500m
1
2
5
THD+N Vs. Frequency (RL=8Ω)
10
5
2
1
0.5
%
0.2
0.1
0.05
0.02
0.008
20
PO=0.3W/0.5W/1W
(Red/Pink/Blue)
50 100 200
500
Hz
1k
2k
5k 10k 20k
THD+N Vs. Frequency (RL=4Ω)
10
5
2
1
0.5
%
0.2
0.1
0.05
PO=0.5W/1W/2W
(Red/Pink/Blue)
0.02
0.01
20
50 100 200
500
Hz
1k
2k
5k 10k 20k
+0
-5
-10
-15
-20
-25
-30
-35
d
B
-40
-45
-50
-55
-60
-65
-70
-75
-80
20
PSRR Vs. Frequency
50 100 200
500
Hz
1k
2k
5k 10k 20k
Crosstalk Vs Frequency
+0
-10
-20
-30
-40
-50
-60
d
B
-70
-80
-90
-100
-110
-120
-130
-140
20
T
L to R
R to L
50 100
200
500
Hz
1k
2k
5k 10k 20k
PAM8408
Document number: DS36992 Rev. 1 - 2
4 of 11
www.diodes.com
June 2014
© Diodes Incorporated
4페이지 A PRODUCT LINE OF
DIODES INCORPORATED
PAM8408
Application Information
Maximum Gain
As shown in block diagram, the PAM8408 has two internal amplifiers stage. The first stage's gain is externally con-figurable, while the second
stage's is internally fixed in a fixed-gain, inverting configuration. The closed-loop gain of the first stage is set by selecting the ratio of Rf to Ri while
the second stage's gain is fixed at 2x. Consequently, the differential gain for the IC is
AVD=20*log [2*(Rf/Ri)]
The PAM8408 sets maximum Rf=218kΩ and minimum Ri=27kΩ, thus the maximum closed-gain is 24dB.
UP/DOWN Volume Control (DVC)
The PAM8408 features a UP/DOWN volume control which consists of the UP and DOWN pins. An internal clock is used where the clock
frequency value is determined from the following formula:
fCLK = fOSC / 213
The oscillator frequency fOSC value is 250kHz typical with ±20% tolerance. The DVC’s clock frequency is 30Hz (cycle time 33ms) typical.
Volume changes are then effected by toggling either the UP or DOWN pins with a logic low. After a period of 1 cycle pulses with either the UP or
DOWN pins held low, the volume will change to the next specified step, either UP or DOWN, and followed by a short delay. This delay decreases
the longer the line is held low, eventually reaching a delay of zero. The delay allows the user to pull the UP or DOWN terminal low once for one
volume change, or hold down to ramp several volume changes. The delay is optimally configured for push button volume control.
If either the UP or DOWN pin remains low after the first volume transition the volume will change again, but this time after 10 cycles. The followed
transition occurs at 4 cycles for each volume transition. This is intended to provide the user with a volume control that pauses briefly after initial
application, and then slowly increases the rate of volume change as it is continuously applied. This cycle is shown in the timing diagram shown in
figure 1.
There are 32 discrete gain settings ranging from +24dB as maximum to -80dB as minimum. Upon device power on, the amplifier's gain is set to a
default value of 12dB, and the gain will remain when applied a logic low to the SD pin, Volume levels for each step vary and are specified in Gain
Setting table on page 7.
If both the UP and DOWN pins are held high, no volume change will occur. Trigger points for the UP and DOWN pins are at 70% of VDD minimum
for a logic high, and 20% of VDD maximum for a logic low. It is recommended, however, to toggle UP and DOWN between VDD and GND for best
performance.
UP/D N
VOL U ME
L EVEL
1 c y c le
1 0 c y c le s
4 c y c le s
4 c y c le s
Figure 1 Timming Diagram
Shutdown Operation
In order to reduce power consumption while not in use, the PAM8408 contains shutdown circuitry that is used to turn off the amplifier's bias
circuitry. This shutdown feature turns the amplifier off when logic low is placed on the SD pin. By switching the SD pin connected to GND, the
PAM8408 supply current draw will be minimized in idle mode. The SD pin cannot be left floating due to the pull-down internal.
Power Supply decoupling
The PAM8408 is a high performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output THD and PSRR
are as low as possible. Power supply decoupling is affecting low frequency response. Optimum decoupling is achieved by using two capacitors of
different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a
good low equivalent-series-resistance (ESR) ceramic capacitor, typically 1.0µF, placed as close as possible to the device VDD terminal works best.
For filtering lower-frequency noise signals, a larger capacitor of 10µF (ceramic) or greater placed near the audio power amplifier is recommended.
PAM8408
Document number: DS36992 Rev. 1 - 2
7 of 11
www.diodes.com
June 2014
© Diodes Incorporated
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부품번호 | 상세설명 및 기능 | 제조사 |
PAM8402 | 2 Watt Class-D Audio Amplifiers | PAM |
PAM8403 | Filterless 3W Class-D Stereo Audio Amplifier | Power Analog Micoelectronics |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |